Data Sheet

AD5593R

Rev. B | Page 27 of 33

ADC OPERATION

The ADC channels of the AD5593R operate as a traditional

multichannel ADC, where each serial transfer selects the next

channel for conversion. The user must write to the ADC

sequence register (see Table 19) to select the input channels to

be included in the conversion sequence before initiating any

Figure 34. When writing to the ADC sequence register, select

which channels are to be converted in sequence. The user can also

set the REP bit to have the ADC repeat conversions in the

sequence.

When the sequence register has been written to, the ADC begins to

track the first channel in the sequence. ADC data can be read

from the AD5593R using any of the three read operations shown

(Figure 37) being the most efficient.

If more than one channel is selected in the ADC sequence

register, the ADC converts all selected channels sequentially in

ascending order. Conversion is started by the rising edge of SCL

at the acknowledge (ACK) preceding the MSB (see Figure 37).

If the REP bit is set after all of the selected channels in the

sequence register have been converted, the ADC repeats the

sequence. If the REP bit is clear, the ADC clocks out the last

by the serial interface, D15 = 0 to indicate that the result is ADC

data. D14 to D12 contain a 3-bit address to indicate which ADC

the data is coming from, and D11 to D0 contain the 12-bit ADC

result (see Table 20).

Figure 40 shows how to configure the AD5593R to perform

ADC conversions. In Step 1, I/O7 and I/O0 are configured as

ADCs. Step 2 writes to the ADC configuration register, sets the

REP bit, and selects ADC7 and ADC0 for inclusion in the

conversion sequence. Step 3 selects the ADCs for reading and

Step 4 begins reading the ADC results. The conversions are

repeated until a stop condition is given by the controller.

The ADC sequence can be changed by writing the new

sequence to the ADC sequence register when conversions are

not taking place. When a new sequence is written, any channels

remaining to be converted from the earlier sequence are

ignored and the ADC starts converting the first channel of the

new sequence.

To stop the ADC conversion sequence, clear the REP, TEMP,

and ADC7 to ADC0 bits in the ADC sequence register to 0.

Table 18. ADC Sequence Register

MSB

LSB

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

Reserved

REP

TEMP

ADC7

ADC6

ADC5

ADC4

ADC3

ADC2

ADC1

ADC0

Table 19. ADC Sequence Register Descriptions

Bits

Description

D15 to D10

Reserved; set this bit to 0

D9

REP: ADC sequence repeat

0 = sequence repetition disabled (default)

1 = sequence repetition enabled

D8

TEMP: include temperature indicator in ADC sequence

0 = disable temperature indicator readback (default)

1 = enable temperature indicator readback

D7 to D0

Setting these bits to 1 includes the appropriate ADC in the conversion sequence; by default no channels are included

Table 20. ADC Data Register

MSB

LSB

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

0

ADC address

12-bit ADC data