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X9470 Datasheet(PDF) 17 Page - Xicor Inc. |
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X9470 Datasheet(HTML) 17 Page - Xicor Inc. |
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17 / 25 page ![]() 17 of 25 REV 11.16 3/20/03 www.xicor.com Preliminary Information X9470 State 3: PA Standby Mode, DC Bias Adjustment [Compensation for VGS Drift and Temperature Variation] When the Power Amplifier is in Standby Mode the X9470 allows for dynamic adjustment of the DC bias- ing point to take into account both VGS drift and tem- perature variation. Dynamic biasing is achieved with the X9470 by using the CS, and SCL pins. For exam- ple, the SCL pin can be a steady clock and the CS pin can be used as a control signal to enable/disable the Bias Adjustment Block. Figure 6 illustrates how the X9470 can be used for dynamic biasing. Upon the presence of an RF signal, the CS pin is pulled LOW. This will prevent the X9470 from changing the VBIAS voltage during IDQ peak cur- rents. Once the RF signal is no longer present, the CS pin can be enabled (closed loop), SDA high and the X9470 Bias Adjustment Circuit moves the VBIAS volt- age (the gate voltage of the FET) to meet the average IDQ bias point for optimum amplifier performance. State 4: Power Off Mode During power saving or power-off modes the X9470 can be shut down via the SHDN pin. This pin pulls the output of the VBIAS pin LOW. |
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