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• 1 Channel Color: This mode uses a sensor tied to the Blue OS

input only. Illumination is switched in RGBRGB pattern at the

line rate. Each color has own digital offset and gain coefficients

as well as static Gain and Offset data. Note that there is a one

line delay between when a line is exposed to a color and when

pixels of that color are clocked out of the sensor. For example,

the Green LEDs should be on while you are clocking out Red

pixels. This mode uses Illumination Mode 2.

5.4 External DRAM Interface

The LM9833 supports two external DRAM sizes: 256k x 16 and

1M x 16. The DRAM is used for line buffering, gain (shading)

coefficient data, offset coefficient data, and gamma correction.

48kwords (16k pixels * 3 colors) are used for gain coefficients,

and another 48kwords (16k pixels * 3 colors) for the offset coeffi-

cients. Gamma correction consumes 12kwords (4k x 3 colors).

The remaining RAM (148kwords = 296kB for 256k DRAM, or

916kwords = 1,832kB for 1M DRAM) is used for the circular

image data buffer. The 1M size does not necessarily provide a

performance advantage (except perhaps when the USB bus is

heavily loaded and I/O is very slow) - the option is there to pro-

vide an alternative to the 256k in case of a supply shortage of

256k DRAMs.

Because the LM9833 does not use any EDO or Fast Page Mode

features, it can work with either EDO or Fast Page Mode DRAM.

The LM9833 should work with most 50-60ns 256k x 16 or 1Mx16

DRAM. Examples:

Samsung: KM416C1000C/C-L-5, KM416C1200C/C-L-5,

KM416C1004C/C-L-5, KM416C1204C/C-L-5 (5V)

KM416V1000C/C-L-5, KM416V1200C/C-L-5, KM416V1004C/C-

L-5, KM416V1204C/C-L-5 (3V)

Alliance: AS4C1M16E5-50 (5V), AS4LC1M16E5-50 (3V)

Micron: MT4LC1M16E5DJ-5, MT4LC1M16E5TG-5 (3V)

There are 2 scan modes: 8 bit and 16 bit. The 8 bit mode is used

for normal scanning to application software to generate 8 bit gray

or 24 bit color images. The 16 bit mode is used for calibration.

The ADC always converts at 1/8 of the MCLK frequency (fADC =

fMCLK/8). The datarate to the DRAM is the ADC rate divided by

the HDPI divider setting (fDRAM = fADC/HDPI_DIVIDER. The off-

set correction data and the gain correction coefficient data are

provided at the DRAM datarate.

The DRAM timing is shown in Figure 34. All the read and write

operations shown in Figure 34 must be done for every pixel writ-

ten to DRAM. That limits the pixel datarate to the DRAM to

1/875ns = 1.14MHz. The following equation must be adhered to

in order to limit the DRAM datarate to 1MHz or slower:

(MCLK div)(HDPI divider)(Int Time Adj) >= 6

Int Time Adj refers to the value in register 19, and will be dis-

cussed in a later section. If register 19 = 0, then the value of Int

Time Adj = 1 (for the purpose of this equation).

5.5 PAPER SENSE and MISC I/O

These 8 pins are used for home and paper sensing, LED dis-

plays, user start buttons, etc.

Two pins are dedicated inputs: PAPER SENSE 1 and PAPER

SENSE 2. The other six pins, MISC I/O 1-6, can be configured as

Figure 32: 1 Channel Grayscale

G LED

B LED

R LED

COEF.

DATA

SC = selected channel (=green in this example)

Figure 33: 1 Channel Color

G LED

B LED

R LED

COEF.

DATA

Figure 34: DRAM Timing per Pixel

RO: Offset Coefficient read

RS: Shading (Gain) Coefficient read

RG: Gamma Table read

WP8: 8 bit pixel write (write 2 pixels as 16 bits

every other cycle)

WP16: 16 bit pixel write

RP: read pixel

RF: refresh

WP8

48MHz

WP16

875ns

8 bit

16 bit

Figure 35: Memory Map of External DRAM

Red Gamma

Green Gamma

Blue Gamma

Red Shading

Green Shading

Blue Shading

Red Offset

Green Offset

Blue Offset

Pixel Data

(256k and 1M)

Pixel Data (1M)

16kwords

Red Shading

Green Shading

Blue Shading

Red Offset

Green Offset

Blue Offset

16kwords

Pixel Data

(256k and 1M)

160

kwords

768

kwords

8 bit Datamode

16 bit Datamode

16kwords

768

kwords

16kwords

148

kwords

4kwords

Pixel Data (1M)

Applications Information (Continued)

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