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THCV216 Datasheet(PDF) 4 Page - THine Electronics, Inc. |
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THCV216 Datasheet(HTML) 4 Page - THine Electronics, Inc. |
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4 / 26 page  THine Electronics, Inc. Security E THCV215-216_Rev.2.70_E Copyright(C)2016 THine Electronics, Inc. Pin Description THCV215 THCV216 Pin Name Pin # Type* Description Pin Name Pin # Type* Description TX0 +/- 50,51 CO RX0 +/- 15,14 CI TX1 +/- 47,48 CO RX1 +/- 19,18 CI TLA0+/- 4,3 LI RLA0+/- 61,62 LO TLB0+/- 6,5 LI RLB0+/- 59,60 LO TLC0+/- 8,7 LI RLC0+/- 57,58 LO TLCLK0+/- 10,9 LI RLCLK0+/ 55,56 LO TLD0+/- 12,11 LI RLD0+/- 53,54 LO TLE0+/- 14,13 LI RLE0+/- 51,52 LO TLF0+/- 16,15 LI RLF0+/- 49,50 LO TLA1+/- 18,17 LI RLA1+/- 47,48 LO TLB1+/- 20,19 LI RLB1+/- 45,46 LO TLC1+/- 22,21 LI RLC1+/- 43,44 LO TLCLK1+/- 24,23 LI RLCLK1+/ 41,42 LO TLD1+/- 26,25 LI RLD1+/- 39,40 LO TLE1+/- 28,27 LI RLE1+/- 37,38 LO TLF1+/- 30,29 LI RLF1+/- 35,36 LO LOCKN 56 I Lock detect input LOCKN 7 O Lock detect output (open drain) HTPDN 57 I Hot plug detect input HTPDN 6 O Hot plug detect output (open drain) PDN 58 I Power down input H: Normal Operation L: Power down (CML output High Fix, other High-Z) PDN 27 I Power down input H: Normal Operation L: Power down (High-Z) COL1, COL0 61,60 I Color depth select input L,L: 6bit L,H: 8bit H,L: 10bit H,H: 12bit COL1, COL0 4,5 I Color depth select input L,L: 6bit L,H: 8bit H,L: 10bit H,H: 12bit SDSEL 62 I Single/Dual select input L: Channel0 enable, Channel1 disable H: Channel0, Channel1 enable SDSEL 3 I Single/Dual select input L: Channel0 enable, Channel1 disable H: Channel0, Channel1 enable DRV1 42 I Must be tied to GND DRV0 41 I Must be tied to VDL PRE1, PRE0 40,39 I Pre-emphasis level select input L,L: 0% H,L: 100% L,H: not available H,H: not available RDY 59 O Link status ready output L: not ready H: ready Reserved 1,2 26,28 I Must be tied to GND Reserved1 37 I Field BET mode enable input L: Normal operation (default) H: Field BET mode enabled Reserved3 29 I Field BET mode enable input L: Normal operation (default) H: Field BET mode enabled Reserved0 38 I Must be tied to GND VDL 8,25 P 1.8V power supply pin for digital circuitry GND 9,24 P Ground pin for digital circuitry CAVDL 12,21 P 1.8V power supply pin for CML input GND 36,54 P Ground pin for digital circuitry CAGND 13,16, 17,20 P Ground pin for CML input CAVDL 45,53 P 1.8V power supply pin for CML output CPVDL0 10 P 1.8V power supply pin for PLL circuitry CAGND 46,49,52 P Ground pin for CML output CPGND0 11 P Ground pin for PLL circuitry CPVDL 43 P 1.8V power supply pin for PLL circuitry CPVDL1 23 P 1.8V power supply pin for PLL circuitry CPGND 44 P Ground pin for PLL circuitry CPGND1 22 P Ground pin for PLL circuitry LPVDL 33,64 P 1.8V power supply pin for LVDS PLL LPVDH 1,32 P 3.3V power supply pin for LVDS PLL LPGND 34,63 P Ground pin for LVDS PLL circuitry LPGND 2,31 P Ground pin for LVDS PLL circuitry LAVDH 2,31 P 3.3V power supply pin for LVDS input LAVDH 34,63 P 3.3V power supply pin for LVDS output LAGND 1,32 P Ground pin for LVDS input LAGND 33,64 P Ground pin for LVDS output *type symbol Note) All CMOS inputs are 1.8V-inputs I=1.8V CMOS Input, O=1.8V CMOS Output, IO3=3.3V CMOS I/O except for THCV216's RS LI=LVDS Input, LO= LVDS Output CI=CML Input, CO=CML Output P=Power VDL 35,55 P 1.8V power supply pin for digital circuitry RS 30 IO3 Direction of RS pin depends on Reserved3. LVDS swing range select input when Reserved3=L H: Normal swing (350mV typ.) L: Reduced swing (200mV typ.) Field BET output when Reserved3=H. Goes LOW when errors detected. CML Data Input LVDS Data Output LVDS Data Input CML Data Output 4/26 |
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