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PCI7621 Datasheet(PDF) 184 Page - Texas Instruments |
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PCI7621 Datasheet(HTML) 184 Page - Texas Instruments |
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184 / 298 page ![]() 8−4 8.1 OHCI Version Register The OHCI version register indicates the OHCI version support and whether or not the serial EEPROM is present. See Table 8−2 for a complete description of the register contents. Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 Name OHCI version Type R R R R R R R RU R R R R R R R R Default 0 0 0 0 0 0 0 X 0 0 0 0 0 0 0 1 Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Name OHCI version Type R R R R R R R R R R R R R R R R Default 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 Register: OHCI version Offset: 00h Type: Read-only Default: 0X01 0010h Table 8−2. OHCI Version Register Description BIT FIELD NAME TYPE DESCRIPTION 31−25 RSVD R Reserved. Bits 31−25 return 0s when read. 24 ‡ GUID_ROM RU The PCI7x21/PCI7x11 controller sets bit 24 to 1 if the serial EEPROM is detected. If the serial EEPROM is present, then the Bus_Info_Block is automatically loaded on system (hardware) reset. The default value for this bit is 0. 23−16 version R Major version of the OHCI. The PCI7x21/PCI7x11 controller is compliant with the 1394 Open Host Controller Interface Specification (Release 1.1); thus, this field reads 01h. 15−8 RSVD R Reserved. Bits 15−8 return 0s when read. 7−0 revision R Minor version of the OHCI. The PCI7x21/PCI7x11 controller is compliant with the 1394 Open Host Controller Interface Specification (Release 1.1); thus, this field reads 10h. ‡ This bit is cleared only by the assertion of GRST. |
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