PCI7421 datasheet(245/298 Pages) TI

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11−7

11.9 Subsystem Vendor Identification Register

The subsystem identification register, used for system and option card identification purposes, may be required for

certain operating systems. This read-only register is initialized through the EEPROM and can be written through the

subsystem access register at PCI offset 50h (see Section 11.22). All bits in this register are reset by GRST only.

Bit

Name

Subsystem vendor identification

Type

Default

Subsystem vendor identification

Offset:

2Ch

Type:

Read/Update

Default:

0000h

11.10 Subsystem Identification Register

The subsystem identification register, used for system and option card identification purposes, may be required for

certain operating systems. This read-only register is initialized through the EEPROM and can be written through the

subsystem access register at PCI offset 50h (see Section 11.22). All bits in this register are reset by GRST only.

Bit

Name

Subsystem identification

Type

Default

Subsystem identification

Offset:

2Eh

Type:

Read/Update

Default:

0000h

11.11

Capabilities Pointer Register

The power management capabilities pointer register provides a pointer into the PCI configuration header where the

power-management register block resides. Since the PCI power management registers begin at 44h, this read-only

Bit

Name

Capabilities pointer

Type

Default

Capabilities pointer

Offset:

34h

Type:

Read-only

Default:

44h

PCI7421 Datasheet(PDF) 245 Page - Texas Instruments

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