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YMF721 Datasheet(PDF) 18 Page - LSI Computer Systems

Part # YMF721
Description  FM Wavetable Synthesizer LSI
PDF  41 Pages
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Manufacturer  LSI [LSI Computer Systems]
Direct Link  http://www.lsicsi.com
Logo LSI - LSI Computer Systems

YMF721 Datasheet(HTML) 18 Page - LSI Computer Systems

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YMF721
July 10, 1997
- 18 -
6-5. FM synthesizer registers
6-5-1. Status register
Status Register (RO):
port
D7D6D5D4D3D2D1D0
OPL_Base + 0
IRQ
FT1
FT2
-
-
-
LD
BUSY0
Note :
Since NEW2 (index 05h of Register array1) = 1 in default state, both LD and BUSY0 bits are valid.
(LD and BUSY0 bits are invalid when NEW2=0.) BUSY0 is a BUSY flag for both FM and
Wavetable registers.
6-5-2. Data register
Data Register Array 0 (R/W):
Index
D7
D6
D5
D4
D3
D2
D1
D0
00 - 01h
LSI TEST
02h
TIMER 1
03h
TIMER 2
04h
RST
MT1
MT2
-
-
-
ST2
ST1
08h
-
NTS
-
-
-
-
-
-
20 - 35h
AM
VIB
EGT
KSR
MULT
40 - 55h
KSL
TL
60 - 75h
AR
DR
80 - 95h
SL
RR
A0 - A8h
F-NUM (L)
B0 - B8h
-
-
KON
BLOCK
F-NUM (H)
BDh
DAM
DVB
RHY
BD
SD
TOM
TC
HH
C0 - C8h
CHD
CHC
CHB
CHA
FB
CNT
E0 - F5h
---
--
WS



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