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SC2200 Datasheet(PDF) 268 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # SC2200
Description  Thin Client On a Chip
PDF  433 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

SC2200 Datasheet(HTML) 268 Page - National Semiconductor (TI)

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268
Revision 3.0
Core Logic Module (Continued)
5.4.4
XpressAUDIO Registers - Function 3
The register designated as Function 3 (F3) is used to con-
figure the PCI portion of support hardware for the Xpres-
sAUDIO registers. The bit formats for the PCI Header
registers are given in Table 5-37.
A Base Address register (F3BAR0), located in the PCI
Header registers of F3, is used for pointing to the register
space designated for support of XpressAUDIO, described
later in this section.
Table 5-37. F3: PCI Header Registers for XpressAUDIO Audio Configuration
Bit
Description
Index 00h-01h
Vendor Identification Register (RO)
Reset Value: 100Bh
Index 02h-03h
Device Identification Register (RO)
Reset Value: 0503h
Index 04h-05h
PCI Command Register (R/W)
Reset Value: 0000h
15:3
Reserved. (Read Only)
2
Bus Master. Allow the Core Logic module bus mastering capabilities.
0: Disable.
1: Enable. (Default)
This bit must be set to 1.
1
Memory Space. Allow the Core Logic module to respond to memory cycles from the PCI bus.
0: Disable.
1: Enable.
This bit must be enabled to access memory offsets through F3BAR0 (See F3 Index 10h).
0
Reserved. (Read Only)
Index 06h-07h
PCI Status Register (RO)
Reset Value: 0280h
Index 08h
Device Revision ID Register (RO)
Reset Value: 00h
Index 09h-0Bh
PCI Class Code Register (RO)
Reset Value: 040100h
Index 0Ch
PCI Cache Line Size Register (RO)
Reset Value: 00h
Index 0Dh
PCI Latency Timer Register (RO)
Reset Value: 00h
Index 0Eh
PCI Header Type (RO)
Reset Value: 00h
Index 0Fh
PCI BIST Register (RO)
Reset Value: 00h
Index 10h-13h
Base Address Register - F3BAR0 (R/W)
Reset Value: 00000000h
This register sets the base address of the memory mapped audio interface control register block. This is a 128-byte block of registers
used to control the audio FIFO and codec interface, as well as to support VSA SMIs. Bits [11:0] are read only (0000 0000 0000), indicat-
ing a 4 KB memory address range. Refer to Table 5-38 on page 269 for the XpressAUDIO configuration register bit formats and reset
values.
31:12
XpressAUDIO Interface Base Address
11:0
Address Range. (Read Only)
Index 14h-2Bh
Reserved
Reset Value: 00h
Index 2Ch-2Dh
Subsystem Vendor ID (RO)
Reset Value: 100Bh
Index 2Eh-2Fh
Subsystem ID (RO)
Reset Value: 0503h
Index 30h-FFh
Reserved
Reset Value: 00h



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