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PC87311AVF Datasheet(PDF) 40 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # PC87311AVF
Description  PC87311A/PC87312 (SuperI/OTM II/III) Floppy Disk Controller with Dual UARTs, Parallel Port, and IDE Interface
PDF  78 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

PC87311AVF Datasheet(HTML) 40 Page - National Semiconductor (TI)

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40 FDC Command Set Description (Continued)
TABLE 4-16 Verify Command Result Phase Table
MT
EC
SCEOT Value
Termination Result
0
0
DTL used (should be FF hex)
No Errors
EOT s
Sectors per Side
0
0
DTL used (should be FF hex)
Abnormal Termination
EOT l
Sectors per Side
01
SC s
Sectors per Side
No Errors
AND
SC s EOT
01
SC l
Sectors Remaining
Abnormal Termination
OR
SC l EOT
1
0
DTL used (should be FF hex)
No Errors
EOT s
Sectors per Side
1
0
DTL used (should be FF hex)
Abnormal Termination
EOT l
Sectors per Side
11
SC s
Sectors per Side
No Errors
AND
SC s EOT
11
SC s (EOT c 2)
No Errors
AND
EOT s
Sectors per Side
11
SC l (EOT c 2)
Abnormal Termination
Note 1
Sectors per Side e number of formatted sectors per each side of the disk
Note 2
Sectors Remaining e number of formatted sectors left which can be read which includes side 1 of the disk if the MT bit is set to 1
Note 3
If MT e 1 and the SC value is greater than the number of remaining formatted sectors on side 0 verifying will continue on side 1 of the disk
Having finished writing the sector the controller will contin-
ue reading the next logical sector unless one or more of the
following termination conditions occurred
1 The DMA controller asserted TC The IC bits in ST0 are
set to Normal Termination
2 The last sector address (of side 1 if MT was set) was
equal to EOT The EOT bit in ST1 is set The IC bits in
ST0 are set to Abnormal Termination This is the expect-
ed condition during Non-DMA transfers
3 Underrun error The OR bit in ST1 is set The IC bits in
ST0 are set to Abnormal Termination If the mP cannot
service a transfer request in time the last correctly writ-
ten byte will be written to the disk
If MT was set in the Opcode command byte and the last
sector of side 0 has been transferred the controller will then
continue with side 1
4224 Write Deleted Data
The Write Deleted Data command receives data from the
host and writes logical sectors containing a Deleted Data
AM to the selected drive This command is identical to the
Write Data command except that a Deleted Data AM is writ-
ten to the Data Field instead of a Normal Data AM
50 FDC Functional Description
The PC87311A12 is software compatible with the DP8473
and 82077 floppy disk controllers Upon a power on reset
the 16-byte FIFO will be disabled Also the disk interface
outputs will be configured as active push-pull outputs which
are compatible with both CMOS inputs and open-collector
resistor terminated disk drive inputs The FIFO can be en-
abled with the Configure command The FIFO can be very
useful at the higher data rates with systems that have a
large amount of DMA bus latency or with multi-tasking sys-
tems such as the EISA or MCA bus structures
The FDC will support all the DP8473 Mode command fea-
tures as well as some additional features These include
control over the enabling of the FIFO for reads and writes a
Non-Burst mode for the FIFO a bit that will configure the
disk interface outputs as open-drain outputs and pro-
grammability of the DENSEL output
51 MICROPROCESSOR INTERFACE
The FDC interface to the microprocessor consists of the
A9 – A3 AEN RD and WR lines which access the chip for
reads and writes the data lines D7 – D0 the address lines
A2 – A0 which select the appropriate register (see Table
3-1)
the IRQ6 signal
and the DMA interface signals
40



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