PC97307 datasheet(103/218 Pages) NSC

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Command Phase

When bit 2 of the second command phase byte (ETR) in the

MODE command is set to 1, the track number is stored as

a 12-bit value. See “Bit 0 - Extended Track Range (ETR)”

on page 92.

In this case, a fourth command byte should be written in the

command phase to hold the Most Significant Nibble (MSN),

i.e., the four most significant bits, of the number of the track

to seek. Otherwise (ETR bit in MODE is 0), this command

phase byte is not required. and, only three command bytes

should be written.

After the last command byte is issued, the Drive Busy bit for

the selected drive is set in the Main Status Register (MSR).

See bits 3-0 in Section 5.3.5 on page 74.

The controller waits the Delay Before Processing time (see

Table 5-25 on page 106) for the selected drive, before issu-

ing the first STEP pulse. After waiting the Delay Before Pro-

cessing time, the controller becomes idle. See “Idle Phase”

on page 80.

Second Command Phase Byte

See READ DATA command for a description of these

bits.

Third Command Phase Byte, Number of Track to Seek

The value in this byte is the number of the track to seek.

Fourth Command Phase Byte,

Bits 7-4 - MSN of Track Number

If the track number is stored as a 12-bit value, these bits

contain the Most Significant Nibble (MSN), i.e., the four

most significant bits, of the number of the track to seek.

Otherwise (the ETR bit in the MODE command is 0), this

command phase byte is not required.

Execution Phase

During the execution phase of the SEEK command, the

track number to seek to is compared with the present track

number. The controller determines how many STEP pulses

to issue and the DIR disk interface output signal indicates

which direction the head should move.

The SEEK command issues step pulses while the controller

is in the drive polling phase. The step pulse rate is deter-

mined by the value programmed in the second command

phase byte of the SPECIFY command.

An interrupt is generated one step pulse period after the last

step pulse is issued. A SENSE INTERRUPT command

should be issued to determine the cause of the interrupt.

Result Phase

None.

76543210

00001111

XXXXX

DS1

DS0

Number of Track to Seek

MSN of Track # to Seek

5.7.18

The SENSE DRIVE STATUS Command

The SENSE DRIVE STATUS command indicates which

drive and which head are selected, whether or not the head

is at track 0 and whether or not the track is write protected

in result phase Status register 3 (ST3). See “Result Phase

Status Register 3 (ST3)” on page 83.

This command does not generate an interrupt.

Command Phase

See READ DATA command for a description of these bits.

Execution Phase

Disk drive status information is detected and reported.

Result Phase

See “Result Phase Status Register 3 (ST3)” on page 83.

5.7.19

The SENSE INTERRUPT Command

The SENSE INTERRUPT command returns the cause of

an interrupt that is caused by the change in status of any

disk drive.

If a SENSE INTERRUPT command is issued when no inter-

rupt is pending it is treated as an invalid command.

When to Issue SENSE INTERRUPT

The SENSE INTERRUPT command is issued to detect ei-

ther of the following causes of an interrupt:

• The FDC became ready during the drive polling phase

for an internally selected drive. See “Drive Polling

Phase” on page 80. This can occur only after a hard-

ware or software reset.

• A SEEK, RELATIVE SEEK or RECALIBRATE com-

mand terminated.

Interrupts caused by these conditions are cleared after the

first result byte has been read. Use the Interrupt Code (IC)

(bits 7,6) and SEEK End bits (bit 5) of result phase Status

See “Bit 5 - SEEK End” on page 81 and Table 5-22.

76543210

00000100

XXXXX

DS1

DS0

76543210

Result Phase Status Register 3 (ST3)

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