PC87317 datasheet(5/272 Pages) NSC

5 / 272 page

Table of Contents

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Table of Contents

Highlights....................................................................................................................................................... 1

1.0

Signal/Pin Connection and Description

1.1

CONNECTION DIAGRAM ......................................................................................................... 16

1.2

SIGNAL/PIN DESCRIPTIONS ................................................................................................... 17

2.0

Configuration

2.1

HARDWARE CONFIGURATION ............................................................................................... 27

2.1.1

Wake Up Options ........................................................................................................ 27

2.1.2

The Index and Data Register Pair ............................................................................... 27

2.1.3

The Strap Pins ............................................................................................................. 28

2.2

SOFTWARE CONFIGURATION ............................................................................................... 28

2.2.1

Accessing the Configuration Registers ........................................................................ 28

2.2.2

Address Decoding ....................................................................................................... 28

2.3

THE CONFIGURATION REGISTERS ....................................................................................... 29

2.3.1

Standard Plug and Play (PnP) Register Definitions .................................................... 30

2.3.2

Configuration Register Summary ................................................................................ 33

2.4

CARD CONTROL REGISTERS ................................................................................................ 37

2.4.1

PC87317 SID Register ................................................................................................ 37

2.4.2

PC97317 SID Register ................................................................................................ 37

2.4.3

SuperI/O Configuration 1 Register (SIOC1) ................................................................ 37

2.4.4

SuperI/O Configuration 2 Register (SIOC2) ................................................................ 38

2.4.5

Programmable Chip Select Configuration Index Register ........................................... 38

2.4.6

Programmable Chip Select Configuration Data Register ............................................ 39

2.4.7

SuperI/O Configuration 3 Register (SIOC3) ................................................................ 39

2.4.8

PC97317 SRID Register .............................................................................................. 39

2.4.9

SuperI/O Configuration F Register (SIOCF), Index 2Fh .............................................. 40

2.5

KBC CONFIGURATION REGISTER (LOGICAL DEVICE 0) .................................................... 40

2.5.1

SuperI/O KBC Configuration Register ......................................................................... 40

2.6

FDC CONFIGURATION REGISTERS (LOGICAL DEVICE 3) .................................................. 40

2.6.1

SuperI/O FDC Configuration Register ......................................................................... 40

2.6.2

Drive ID Register ......................................................................................................... 41

2.7

PARALLEL PORT CONFIGURATION REGISTER (LOGICAL DEVICE 4) ............................... 41

2.7.1

SuperI/O Parallel Port Configuration Register ............................................................. 41

2.8

UART2 AND INFRARED CONFIGURATION REGISTER (LOGICAL DEVICE 5) .................... 42

2.8.1

SuperI/O UART2 Configuration Register ..................................................................... 42

2.9

UART1 CONFIGURATION REGISTER (LOGICAL DEVICE 6) ................................................ 42

2.9.1

SuperI/O UART1 Configuration Register ..................................................................... 42

2.10

PROGRAMMABLE CHIP SELECT CONFIGURATION REGISTERS ...................................... 42

2.10.1

CS0 Base Address MSB Register ............................................................................... 43

2.10.2

CS0 Base Address LSB Register ................................................................................ 43

2.10.3

CS0 Configuration Register ......................................................................................... 43

2.10.4

Reserved ..................................................................................................................... 43

2.10.5

CS1 Base Address MSB Register ............................................................................... 43

PC87317 Datasheet(PDF) 5 Page - National Semiconductor (TI)

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