PC87317 datasheet(17/272 Pages) NSC

17 / 272 page

Signal/Pin Connection and Description

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1.2

SIGNAL/PIN DESCRIPTIONS

TABLE 1-1 "Signal/Pin Description Table" lists the signals

of the PC87317VUL in alphabetical order and shows the

pin(s) associated with each. TABLE 1-2 "Multiplexed X-Bus

Data Buffer (XDB) Pins" on page 25 lists the X-Bus Data

Buffer (XDB) signals that are multiplexed and TABLE 1-6

"Pins with a Strap Function During Reset" on page 26 lists

the pins that have strap functions during reset.

The Module column indicates the functional module that is

associated with these pins. In this column, the System label

indicates internal functions that are common to more than

one module. The I/O and Group # column describes wheth-

er the pin is an input, output, or bidirectional pin (marked as

Input, Output or I/O, respectively).

TABLE 1-1. Signal/Pin Description Table

Signal/Pin

Name

Number

Module

I/O and

Group #

Function

A15-0

29-26,

23-12

ISA-Bus

Input

Group 1

ISA-Bus Address – A15-0 are used for address decoding on any

access except DMA accesses, on condition that the AEN signal is

low.

See Section 2.2.2 on page 28.

ACK

113

Parallel Port

Input

Group 3

Acknowledge – This input signal is pulsed low by the printer to

indicate that it has received data from the parallel port. This pin is

internally connected to a weak pull-up.

AFD

119

Parallel Port

I/O

Group 13

Automatic Feed – When this signal is low the printer should

automatically feed a line after printing each line. This pin is in TRI-

STATE after a 0 is loaded into the corresponding control register bit.

An external 4.7 K

Ω pull-up resistor should be attached to this pin.

For Input mode see bit 5 in Section 6.5.16 on page 152.

This signal is multiplexed with DSTRB. See TABLE 6-12 on page 160

for more information.

AEN

ISA-Bus

Input

Group 1

DMA Address Enable – This input signal disables function selection

via A15-0 when it is high. Access during DMA transfer is not affected

by this signal.

ASTRB

118

Parallel Port

Output

Group 13

Address Strobe (EPP) – This signal is used in EPP mode as an

address strobe. It is active low.

This signal is multiplexed with SLIN.See TABLE 6-12 on page 160 for

more information.

BADDR1,0

136, 134

Conﬁguration

Input

Group 5

Base Address Strap Pins 0 and 1 – These pins determine the base

addresses of the Index and Data registers, the value of the Plug and

Play ISA Serial Identiﬁer and the conﬁguration state immediately after

reset. These pins are pulled down by internal 30 K

Ω resistors.

External 10 K

Ω pull-up resistors to V

DD should be employed.

BADDR1 is multiplexed with RTS1.

BADDR0 is multiplexed with DTR1 and BOUT1.

See TABLE 2-2 on page 28 and Section 2.1 on page 27.

BOUT2,1

148, 138

UART1,

UART2

Output

Group 17

Baud Output – This multi-function pin provides the associated serial

channel Baud Rate generator output signal if test mode is selected,

i.e., bit 7 of the EXCR1 register is set. See “Bit 7 - Baud Generator

Test (BTEST)” on page 180.

After Master Reset this pin provides the SOUT function.

BOUT2 is multiplexed with DTR2 and CFG1.

BOUT1 is multiplexed with DTR1 and BADDR0.

BUSY

111

Parallel Port

Input

Group 2

Busy – This pin is set to high by the printer when it cannot accept

another character. It is internally connected to a weak pull-down

resistor.

This signal is multiplexed with WAIT. See TABLE 6-12 on page 160 for

more information.

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