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PC87332 Datasheet(PDF) 44 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # PC87332
Description  PC87332VLJ (3.3V/5V) and PC87332VLJ-5 (5V) (SuperI/OTM III Premium Green) Floppy Disk Controller, Dual UARTs, IEEE1284 Parallel Port, and IDE Interfac
PDF  98 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

PC87332 Datasheet(HTML) 44 Page - National Semiconductor (TI)

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40 FDC Command Set Description (Continued)
3 If the Address Field ID comparison fails the controller
sets ND in ST1 but continues to read the sector If there
is a CRC error in the Address Field the controller sets CE
in ST1 but continues to read the sector
4 Multi-track and Skip operations are not allowed SK and
MT should be set to 0
5 If there is a CRC error in the Data Field the controller
sets CE in ST1 and CD in ST2 but continues reading
sectors
6 The controller reads a maximum of EOT physical sectors
There is no support for multi-track reads
Command Phase
0
MFM
0
0
0
0
1
0
IPS
X
X
X
X
HD
DR1
DR0
Track Number
Drive Head Number
Sector Number
Bytes per Sector
End of Track Sector Number
Intersector Gap Length
Data Length
Execution Phase
Data read from disk drive is transferred
to system via DMA or non-DMA modes
Result Phase
Status Register 0
Status Register 1
Status Register 2
Track Number
Head Number
Sector Number
Bytes per Sector
4113 Recalibrate Command
The Recalibrate command is very similar to the Seek com-
mand The controller sets the Present Track Register (PTR)
of the selected drive to zero It then steps the head of the
selected drive out until the TRK0 disk interface input signal
goes active or until the maximum number of step pulses
have been issued See Table 4-12 for the maximum recali-
brate step pulse values based on the R255 and ETR bits in
the Mode command If the number of tracks on the disk
drive exceeds the maximum number of recalibrate step
pulses another Recalibrate command may need to be is-
sued
TABLE 4-12 Maximum Recalibrate
Step Pulses Based on R255 and ETR
R255
ETR
Maximum Recalibrate
Step Pulses
0
0
85 (default)
1
0
255
0
1
3925
1
1
4095
After the last command byte is issued the DRx BUSY bit is
set in the MSR for the selected drive The controller will
simulate the Motor On time and then enter the Idle Phase
The execution of the actual step pulses occur while the con-
troller is in the Drive Polling Phase An interrupt will be gen-
erated after the TRK0 signal is asserted or after the maxi-
mum number of recalibrate step pulses are issued There is
no Result Phase Recalibrates should not be issued on
more than one drive at a time This is because the drives are
actually selected via the DOR which can only select one
drive at a time No other command except the Sense Inter-
rupt command should be issued while a Recalibrate com-
mand is in progress
Command Phase
000001
1
1
000000DR1
DR0
Execution Phase
Disk drive head is stepped out to Track 0
Result Phase
None
4114 Relative Seek Command
The Relative Seek command steps the selected drive in or
out a given number of steps This command will step the
readwrite head an incremental number of tracks as op-
posed to comparing against the internal present track regis-
ter for that drive
Command Phase
1
DIR
0
0
1
1
1
1
X
X
X
X
X
HD
DR1
DR0
Execution Phase
Disk drive head stepped in or out a pro-
grammable number of tracks
Result Phase
None
The Relative Seek parameters are defined as follows
DIR
ReadWrite Head Step Direction Control
0 e
Step Head Out
1 e
Step Head In
RTN
Relative Track Number This value will determine how
many incremental tracks to step the head in or out
from the current track number
The controller will issue RTN number of step pulses and
update the Present Track Register for the selected drive
The one exception to this is if the TRK0 disk input goes
active which indicates that the drive readwrite head is at
the outermost track In this case the step pulses for the
Relative Seek are terminated and the PTR value is set ac-
cording to the actual number of step pulses issued The
arithmetic is done modulo 255 The DRx BUSY bit in the
MSR is set for the selected drive The controller will simu-
late the Motor On time before issuing the step pulses After
the Motor On time the controller will enter the Idle Phase
The execution of the actual step pulses occurs in the Idle
Phase of the controller
After the step operation is complete the controller will gen-
erate an interrupt There is no Result Phase Relative Seeks
should not be issued on more than one drive at a time This
is because the drives are actually selected via the DOR
which can only select one drive at a time No other com-
mand except the Sense Interrupt command should be is-
sued while a Relative Seek command is in progress
44



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