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PC97338VLJ Datasheet(PDF) 63 Page - National Semiconductor (TI) |
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PC97338VLJ Datasheet(HTML) 63 Page - National Semiconductor (TI) |
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63 / 221 page ![]() 63 www.national.com 2.3.31 SIO Base Address Low Byte Register (SBAL), Index 4Ah This register holds the low address bits of the base address of the SuperI/O chip, i.e., the Chip. These bits are also the low address bits of the INDEX regis- ter. The address of the DATA register is the next consec- utive address after the address of the INDEX register. The reset value of SBAL depends on the values of BADDR0 and BADDR1 during reset. See Table 25. For more details about programming the Chip’s base address, see Section 2.2.5 on page 38. It is the software’s responsibility to configure all devic- es so as to avoid conflicts. TABLE 25. SBAL Reset Values FIGURE 33. SBAL Register Bitmap 2.3.32 SIO Base Address High Byte Register (SBAH), Index 4Bh This register holds the high address bits of the base address of the SuperI/O chip, i.e., the Chip. These bits are also the high address bits of the INDEX reg- ister. The address of the DATA register is the next consec- utive address after the address of the INDEX register. The reset value of SBAH depends on the values of BADDR0 and BADDR1 during reset. See Table 26. For more details about programming the Chip’s base address see Section 2.2.5 on page 38. It is the software’s responsibility to configure all devic- es so as to avoid conflicts. TABLE 26. SBAH Reset Values FIGURE 34. SBAH Register Bitmap 2.3.33 System IRQ Input 1 Configuration Register (SIRQ1), Index 4Ch This register allows configuration of the SIRQI1 sig- nal. It is initialized to x0x00000 during reset. FIGURE 35. SIRQ1 Register Bitmap BADDR1 BADDR0 SBAL Reset Value 0 0 98h 0 1 Undefined 10 5Ch 11 2Eh 76 543 21 0 Reset Required Reserved A1 A2 A3 A4 A5 A6 A7 (SBAL) SuperI/O Chip Base Address Index 4Ah Low Byte Register BADDR1 BADDR0 SBAH Reset Values 0 0 03h 0 1 Undefined 1 0 01h 1 1 00h A8 A9 A10 A11 A12 A13 A14 A15 A8 A9 Reserved A10 Reserved Reserved Reserved Reserved Address Length 7 654 32 10 Reset Required 11 Bits 16 bits CFG0 = 1 CFG0 = 0 (SBAH) SuperI/O Chip Base Address Index 4Bh High Byte Register 76 543 21 0 Reset Required 0 0 0 0 0 x 0 x (SIRQ1) System IRQ Input 1 Index 4Ch Configuration Register Invert SIRQI1 SIRQI1 Status Select IRQ15, SIRQI1 or DRQ3 SIRQI1 Mapping |
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