L6758ATR datasheet(7/42 Pages) STMICROELECTRONICS

7 / 42 page

DocID023298 Rev 2

7/42

L6758A

Pin description and connection diagrams

7REF

The reference used for the regulation of the multi-phase section is

available on this pin with -100 mV offset. Connect through an R

REF

-C

REF

to RGND to optimize DVID transitions. Connect through an R

resistor to

FB pin to implement small positive offset to the regulation.

8GDC

Gate drive control pin.

Used for efficiency optimization, see

Section 9 for details. If not used, it

can be left floating.

VCC12

+12 V bus monitor to synchronize startup.

The IC waits for the 12 V to become available before implementing soft-

start when enabled. Connect directly to the +12 V bus (i.e. the high-side

MOSFET drain).

SVCLK

Serial clock.

ALERT#

Alert.

SVDATA

Serial data.

EN_VTT

VTT level sensitive enable pin (3.3 V compatible).

Pull low to disable the device, pull up above the turn-on threshold to

enable the controller.

SPWM /

SEN

PWM output.

Connect to external driver PWM input. During normal operation the device

is able to manage HiZ status by setting and holding the pin to a fixed

voltage defined by PWMx strapping. Connect to VCC5 with 1 k

Ω to

disable single-phase section.

VR_HOT

Voltage regulator HOT.

Open drain output; this is an alarm signal asserted by the controller when

the temperature sensed through the TM and or ST pins exceed TMAX

(active low). See

Section 8 for details.

SCSP

Single-phase section current sense positive input.

Connect through an R-C filter to the phase-side of the channel 1 inductor.

SCSN

Single-phase section current sense negative input.

Connect through an Rg resistor to the output-side of the channel inductor.

Filter the output-side of Rg with 100 nF (typ.) to GND.

SIMON

Current monitor output.

A current proportional to the single-phase current is sourced from this pin.

Connect through a resistor R

SIMON

to local GND. When the pin voltage

reaches 1.55 V, overcurrent protection is set and the IC latches. Filtering

through C

SIMON

to GND allows to control the delay for OC intervention.

SRGND

Remote ground sense.

Connect to the negative side of the load to perform remote sense.

SVSEN

Output voltage monitor, manages OV and UV protection. Connect to the

positive side of the load to perform remote sense.

SFB

Error amplifier inverting input.

Connect with a resistor R

SFB

to SVSEN and with an (R

- C

)// C

SCOMP.

Table 2. Pin description (continued)

Pin#

Name

Function

L6758ATR Datasheet(PDF) 7 Page - STMicroelectronics

L6758ATR Datasheet(HTML) 7 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42

Datasheet Download

Link URL