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L6758ATR Datasheet(PDF) 19 Page - STMicroelectronics |
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L6758ATR Datasheet(HTML) 19 Page - STMicroelectronics |
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19 / 42 page ![]() DocID023298 Rev 2 19/42 L6758A VR12 serial data bus and IC configuration 42 39 82 1.100 1.100 GFX 32 μs 00 47 110 1.000 1.000 GFX 06 10 36 1.000 1.000 GFX 32 μs 00 18 75 0.900 0.900 GFX 06 10 75 0.900 0.900 GFX 32 μs00 10 100 0.000 0.000 GFX 1 μs06 10 Open 0.000V 0.000 GFX 1 μs00 1. Suggested values, divider must be connected between VCC5 pin and GND. 2. N is the number of phases programmed for the multi-phase section. Table 10. Device configuration - single - phase section Mode (from VBOOT) VBOOT DROOP SIMAX [A] GFX See Table 9 Enabled 25 to 40 VSA Disabled 5 to 29 Table 11. DPM and TMAX pinstrapping (see Section 9.1) COMP/SCOMP DPM threshold set TMAX [C] 33 k to GND Set 3 130 17.5 k to GND Set 2 120 12.5 k to GND Set 1 110 5.6 k to GND OFF 100 Table 9. BOOT / ADDR pinstrapping(1) (continued) R down [k Ω] R up [k Ω] BOOT ADDR[h](2) Multi-phase [V] Single-phase [V] Single-phase mode Link-Rest |
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