AMT49413 datasheet(2/21 Pages) ALLEGRO

2 / 21 page

3-Phase BLDC Controller and MOSFET Driver

AMT49413

Allegro MicroSystems, LLC

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

the PWM input can be used to provide speed and torque control,

allowing the internal current control circuit to set the maximum

current limit.

Efficiency is enhanced by using synchronous rectification. The

power FETs are protected from shoot-through by integrated

crossover control with dead time. The dead time can be set by a

single external resistor.

The AMT49413 is supplied in a 48-pin QFN with exposed thermal

pad. This is a small footprint (49 mm2) power package, that is lead

(Pb) free, with 100% matte-tin leadframe plating.

SELECTION GUIDE

ABSOLUTE MAXIMUM RATINGS

Part Number

Packing

Package

AMT49413GEVATR

1000 pieces per 7-inch reel

7 × 7 mm QFN with exposed pad

DESCRIPTION (continued)

Parameter

Symbol

Conditions

Rating

Units

Load Supply Voltage

VBB

VBB pin

–0.3 to 50

Logic Input/Output Voltage

VRESET

RESET pin input

–0.3 to 6

Remaining logic pins

–0.3 to 7

Output Voltage Range

VGHx

GHA, GHB, and GHC pins

VSx to VSx + 15

VGLx

GLA, GLB, and GLC pins

–5 to 16

VCx

CA, CB, and CC pins

VSx+ 15

VSx

SA, SB, and SC pins

–5 to 55

CSP, CSN, and LSS pins

–4 to 6.5

CSO, VDSTH pins

–0.3 to 6.5

VDRAIN pin

–0.3 to 55

Operating Temperature Range (G)

–40 to 105

°C

Junction Temperature

150

°C

Transient Junction Temperature

TtJ

Overtemperature event not exceed-

ing 1 s, lifetime duration not exceed-

ing 10 hr; guaranteed by design

characterization

175

°C

Storage Temperature Range

Tstg

–55 to 150

°C

ESD Rating, Human Body Model

AEC-Q100-002, all pins except CP1

2000

AEC-Q100-002, pin CP1

1000

ESD Rating, Charged Device Model

AEC-Q100-011, all pins

1050

THERMAL CHARACTERISTICS: May require derating at maximum conditions; see Applications Information section

Characteristic

Symbol

Test Conditions*

Value Units

Package Thermal Resistance

RθJA

High-K PCB (multilayer with significant copper areas,

based on JEDEC standard JESD51-7)

ºC/W

Die-to-Exposed Pad Thermal Resistance

RθJP

ºC/W

*Additional thermal information available on Allegro website.

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