3-Phase BLDC Controller and MOSFET Driver

AMT49413

20

Allegro MicroSystems, LLC

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

PACKAGE OUTLINE DRAWING

For Reference Only – Not for Tooling Use

(Reference DWG-2867)

Dimensions in millimeters

NOT TO SCALE

Exact case and lead configuration at supplier discretion within limits shown

C

SEATING

PLANE

C

0.08

49X

48

48

2

1

1

2

A

A

B

C

D

D

C

0.50 BSC

7.00 BSC

7.00 BSC

0.90 NOM

0.40 NOM

B

0.25

5.15 ±0.10

5.15 ±0.10

0.50

1.00

4X0.20 MIN

7.0

7.0

48

2

1

0.30

5.15

5.15

+0.30

-0.18

PCB Layout Reference View

Terminal #1 mark area

Exposed thermal pad (reference only, terminal #1 identifier appearance at supplier discretion)

Reference land pattern layout (reference IPC7351 QFN50P700X700X100-49M);

all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to

meet application process requirements and PCB layout tolerances; when mounting

on a multilayer PCB, thermal vias at the exposed thermal pad land can improve

thermal dissipation (reference EIA/JEDEC Standard JESD51-5)

Coplanarity includes exposed thermal pad and terminals

Figure 5: Package EV, 48 Terminal QFN with Exposed Thermal Pad