TS8388BCFS datasheet(8/57 Pages) ATMEL

8 / 57 page

TS8388B

2144C–BDC–04/03

Effective Number Of Bits

ENOB

–

–––

–

FS = 1 GSPS, FIN = 20 MHz

7.0

7.2

–

Bits

S = 1 GSPS, FIN = 500 MHz

6.6

6.8

–

Bits

FS = 1 GSPS, FIN = 1000 MHz (-1 dBFs)

6.2

6.4

–

Bits

FS = 50 MSPS, FIN = 25 MHz

1, 2, 6

7.0

7.2

–

Bits

Signal to Noise Ratio

SNR

–

–––

–

(2)

FS = 1 GSPS, FIN = 20 MHz

–

FS = 1 GSPS, FIN = 500 MHz

–

S = 1 GSPS, FIN = 1000 MHz (-1 dBFs)

–

FS = 50 MSPS, FIN = 25 MHz

1, 2, 6

–

Total Harmonic Distortion

THD

–

–––

–

(2)

S = 1 GSPS, FIN = 20 MHz

–

FS = 1 GSPS, FIN = 500 MHz

–

FS = 1 GSPS, FIN = 1000 MHz (-1 dBFs)

–

S = 50 MSPS, FIN = 25 MHz

1, 2, 6

–

Spurious Free Dynamic Range

SFDR

–

–––

–

(2)

S = 1 GSPS, FIN = 20 MHz

–

dBc

S = 1 GSPS, FIN = 500 MHz

–

dBc

FS = 1 GSPS, FIN = 1000 MHz (-1 dBFs)

–

dBc

S = 1 GSPS, FIN = 1000 MHz (-3 dBFs)

–

dBc

S = 50 MSPS, FIN = 25 MHz

1, 2, 6

–

dBc

Two-tone Inter-modulation Distortion

IMD

–––

–

(2)

IN1 = 489 MHz at FS = 1 GSPS,

FIN2 = 490 MHz at FS = 1 GSPS

–

-47

-52

–

dBc

Switching Performance and Charcteristics – See Figure 2 and Figure 3 on page 10

Maximum clock frequency

–1

–

1.4

GSPS

(14)

Minimum clock frequency

10–50

MSPS

(15)

Minimum Clock pulse width (high)

TC1

0.280

0.500

Minimum Clock pulse width (low)

TC2

0.350

0.500

Aperture delay

100

+250

400

(2)

Aperture uncertainty

Jitter

–

0.4

0.6

ps (rms)

(2)(5)

Data output delay

TDO

1150

1360

1660

(2)(10)

(11)(12)

Output rise/fall time for DATA (20% – 80%)

TR/TF

250

350

550

(11)

Output rise/fall time for DATA READY (20% –

80%)

TR/TF

250

350

550

(11)

Table 3. Electrical Specifications (Continued)

Parameter

Symbol

Test

Level

Value

Unit

Note

Min

Typ

Max

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