TLE 6209 R

Data Sheet, Version 3.0

7

2001-10-15

2.2

Supply

2.2.1

Logic Supply Voltage, Power-On-Reset

The logic is supplied with 5 V by the

V

The advantage of this system is that information stored in the logic remains intact even

in the event of failures in the supply voltage

V

be read out via the SPI. If

V

internally stored data is deleted and the Output Stages are switched to tristate. The IC is

restarted on rising

V

After this restart at increasing

V

inhibit mode (INH L to H), the IC is initialized by Power-On-Reset (POR). After POR, all

SPI control bits are set to L. This setting remains valid until first SPI communication. Also

the error bits are reset by POR.

2.2.2

Power Supply Voltage

The power stages are connected to the supply voltage

V

over voltage (OV) and under voltage (UV) comparators as described in Section 2.5.6.

The power supply voltage needs a blocking capacitor to GND.

2.3

Direct Inputs

2.3.1

Inhibit (sleep mode)

The INH input can be used to cut off the complete IC. By pulling the INH input to low, the

power stages are switched to tristate, and the current consumption is reduced to just a

few

TLE 6209 R is reinitialized with POR if INH is put to high again. The pin has an internal

pull-down.

2.3.2

Disable

The DIS input can be used to disable the output stages. By pulling the DIS input to high

the power stages are switched to tristate, regardless of the signals at the DIR and PWM

inputs. The DIS input can be used as an emergency disable without resetting the SPI

data stored in the IC. It has an internal pull-up.

1

0

Temperature Warning

1

1

Overtemperature Shutdown

Table 5

Temperature Monitoring

Bit 2

Bit 1

Chip Temperature