PC87334VLJ datasheet(44/102 Pages) NSC

44 / 102 page

40 FDC Command Set Description (Continued)

Having found the Data Field the controller then transfers

data bytes from the disk drive to the host (described in

Section 53 Controller Phases) until the bytes per sector

count has been reached or the host terminates the opera-

tion (through TC end of track or implicitly through overrun)

The controller then generates the CRC for the sector and

compares this value with the CRC at the end of the Data

Field

Having finished reading the sector the controller continues

reading the next logical sector unless one or more of the

following termination conditions occurred

1 The DMA controller asserted TC The IC bits in ST0 are

set to Normal Termination

2 The last sector address (of side 1 if MT was set) was

equal to EOT The EOT bit in ST1 is set The IC bits in

ST0 are set to Abnormal Termination This is the expect-

ed condition during Non-DMA transfers

3 Overrun error The OR bit in ST1 is set The IC bits in ST0

are set to Abnormal Termination If the mP cannot service

a transfer request in time the last correctly read byte is

transferred

4 CRC error The CE bit in ST1 and the CD bit in ST2 are

set The IC bits in ST0 are set to Abnormal Termination

If Multi-Track Selector (MT) was set in the Opcode com-

mand byte and the last sector of side 0 has been trans-

ferred the controller then continues with side 1

Upon terminating the Execution Phase of the Read Data

command the controller asserts IRQ6 indicating the begin-

ning of the Result Phase The mP must then read the result

bytes from the FIFO The values that are read back in the

result bytes are shown in Table 4-10 If an error occurs the

result bytes indicate the sector read when the error oc-

curred

Command Phase

MFM

IPS

DR1

DR0

Track Number

Drive Head Number

Sector Number

Bytes per Sector

End of Track Sector Number

Intersector Gap Length

Data Length

Execution Phase

Data read from disk drive is transferred

to system via DMA or Non-DMA modes

Result Phase

Status Register 0

Status Register 1

Status Register 2

Track Number

Head Number

Sector Number

Bytes per Sector

TABLE 4-9 SK Effect on the Read Data Command

Data Type

Sector Read

CM Bit (ST2)

Description of Results

Normal

Normal Termination

Deleted

No Further Sectors Read

Normal

Normal Termination

Deleted

Sector Skipped

TABLE 4-10 Result Phase Termination Values with No Error

Sector

Last

ID Information at Result Phase

Track

Head

Sector

BytesSector

EOT

S a 1NC

EOT

T a 1NC

EOT

S a 1NC

EOT

T a 1NC

EOT

S a 1NC

EOT

S a 1NC

EOT

T a 10

EOT e End of Track Sector Number from Command Phase

S e Sector Number last operated on by controller

NC e No Change in Value

T e Track Number programmed in Command Phase

PC87334VLJ Datasheet(PDF) 44 Page - National Semiconductor (TI)

PC87334VLJ Datasheet(HTML) 44 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL