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HT45F2020 Datasheet(PDF) 10 Page - Holtek Semiconductor Inc |
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HT45F2020 Datasheet(HTML) 10 Page - Holtek Semiconductor Inc |
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10 / 85 page ![]() Rev. 1.00 10 April 11, 2017 Rev. 1.00 11 April 11, 2017 HT45F2020/HT45F2022 Sound Effect Generator Flash MCU HT45F2020/HT45F2022 Sound Effect Generator Flash MCU Symbol Parameter Test Conditions Min. Typ. Max. Unit VDD Conditions VIH Input High Voltage for I/O Ports 5V — 3.5 — 5 V — — 0.8VDD — VDD V IOL Sink Current for I/O Port 3V VOL=0.1VDD 18 36 — mA 5V VOL=0.1VDD 40 80 — mA IOH Source Current for I/O Ports 3V VOH=0.9VDD -3 -6 — mA 5V VOH=0.9VDD -7 -14 — mA RPH Pull-high Resistance for I/O Ports and OCDS pins 3V — 20 60 100 kΩ 5V — 10 30 50 kΩ ILEAK Input Leakage Current 3V VIN=VDD or VIN=VSS — — ±1 μA 5V — — ±1 μA IOCDS Operating Current (Normal Mode) 3V No load, f SYS =fHIRC=8MHz, WDT enable — 1.4 2.0 mA Note:FortheHT45F2020anexternalresistorshouldbeseriallyconnectedbetweenthesupplypowerandVDD pin.Refertothe“ShuntRegulator”sectionforthedetails. A.C. Characteristics Ta=25°C Symbol Parameter Test Conditions Min. Typ. Max. Unit VDD Conditions fSYS System Clock (HIRC) 2.2V~5.5V fSYS=fHIRC=8MHz — 8 — MHz System Clock (LIRC) 2.2V~5.5V fSYS=fLIRC=32kHz — 32 — kHz fHIRC High Speed Internal RC Oscillator (HIRC) 3V/5V Ta=25°C -2% 8 +2% MHz 3V/5V Ta=0°C to 70°C -5% 8 +5% MHz 2.2V~5.5V Ta=0°C to 70°C -8% 8 +8% MHz 2.2V~5.5V Ta=-40°C to 85°C -12% 8 +12% MHz fLIRC Low Speed Internal RC Oscillator (LIRC) 2.2V~5.5V Ta=-40°C ~ 85°C 8 32 50 kHz 2.2V~5.5V Ta=-40°C ~ 85°C 8 32 50 kHz tTCK PTCK Input Pin Minimum Pulse Width — — 0.3 — — μs tTPI PTPI Input Pin Minimum Pulse Width — — 0.3 — — μs tRSTD System Reset Delay Time (POR Reset, WDT Software Reset) — — 25 50 100 ms System Reset Delay Time (WDT Time-out Hardware Cold Reset) — — 8.3 16.7 33.3 ms tSST System Start-up Timer Period (Wake-up from Power Down Mode and fSYS Off) — fSYS=fH ~ fH/64, fH=fHIRC 16 — — tHIRC — fSYS=fSUB=fLIRC 2 — — tLIRC System Start-up Timer Period (Slow Mode ↔ Normal Mode) — fHIRC off → on (HIRCF=1) 16 — — tHIRC System Start-up Timer Period (Wake-up from Power Down Mode and fSYS On) — fSYS=fH ~ fH/64, fSYS=fHIRC 2 — — fH — fSYS=fLIRC 2 — — fSUB System Start-up Timer Period (WDT Time-out Hardware Cold Reset) — — 0 — — fH tSRESET Minimum Software Reset Width to Reset — — 45 90 250 μs Note:1.tSYS=1/fSYS 2.TomaintaintheaccuracyoftheinternalHIRCoscillatorfrequency,a0.1μFdecouplingcapacitorshould beconnectedbetweenVDDandVSSandlocatedasclosetothedeviceaspossible. |
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