AD9629 datasheet(4/33 Pages) AD

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Data Sheet

AD9629

Rev. B | Page 3 of 32

GENERAL DESCRIPTION

The AD9629 is a monolithic, single channel 1.8 V supply,12-bit,

20 MSPS/40 MSPS/65MSPS/80 MSPS analog-to-digital conver-

ter (ADC). It features a high performance sample-and-hold

circuit and on-chip voltage reference.

The product uses multistage differential pipeline architecture

with output error correction logic to provide 12-bit accuracy at

80 MSPS data rates and to guarantee no missing codes over the

full operating temperature range.

The ADC contains several features designed to maximize

flexibility and minimize system cost, such as programmable

clock and data alignment and programmable digital test pattern

generation. The available digital test patterns include built-in

deterministic and pseudorandom patterns, along with custom

user-defined test patterns entered via the serial port interface(SPI).

A differential clock inputwith optional1, 2, or 4 divide ratios

controls all internalconversioncycles.

The digital output data is presented inoffset binary, graycode,

or twos complement format. A data outputclock (DCO) is

provided to ensure proper latch timingwith receivinglogic.Both

1.8 V and 3.3 V CMOS levels are supported.

The AD9629 is available in a 32-lead RoHScompliantLFCSP

and is specified over the industrial temperature range (−40°C

to +85°C).

AD9629 Datasheet(PDF) 4 Page - Analog Devices