MK1709STR datasheet(4/9 Pages) ICST

4 / 9 page

Low EMI Clock Generator

MDS 1709 D

Revision 031204

Integrated Circuit Systems, Inc.

● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com

MK1709

External Components

The MK1709 requires a minimum number of external

components for proper operation.

Decoupling Capacitor

A decoupling capacitor of 0.01µF must be connected

between VDD and GND on pins 2 and 3 for the

MK1709S, or pins 1 and 8 for the MK1709AG. Place

the capacitor as close to these pins as possible. For

optimum device performance, the decoupling capacitor

should be mounted on the component side of the PCB.

Avoid the use of vias in the decoupling circuit.

Series Termination Resistor

When the PCB trace between the clock output and the

load is over 1 inch, series termination should be used.

To series terminate a 50

Ω trace (a commonly used

trace impedance), place a 33

Ω resistor in series with

the clock line, as close to the clock output pin as

possible. The nominal impedance of the clock output is

Ω.

Select Pin Operation

The S1, S0 select pins are 2-level, meaning they have

three separate states to make the selections shown in

the table on page 2.

PCB layout Recommendations

For optimum device performance and lowest output

phase noise, the following guidelines should be

observed.

1) The 0.01µF decoupling capacitor should be mounted

on the component side of the board as close to the

VDD pin as possible. No vias should be used between

the decoupling capacitor and VDD pin. The PCB trace

to VDD pin should be kept as short as possible, as

should the PCB trace to the ground via.

2) Place a 33

Ω series termination resistor (if needed)

close to the clock output to minimize EMI.

3) An optimum layout is one with all components on the

same side of the board, minimizing vias through other

signal layers. Other signal traces should be routed

away from the MK1709. This includes signal traces just

underneath the device, or on layers adjacent to the

ground plane layer used by the device.

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