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DAC38RF82 Datasheet(PDF) 53 Page - Texas Instruments |
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DAC38RF82 Datasheet(HTML) 53 Page - Texas Instruments |
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53 / 140 page ![]() 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 –4 –3 –2 –1 0 1 2 3 4 f/f DAC G056 sin(x)/x Corrected FIR4 53 DAC38RF82, DAC38RF89 www.ti.com SLASEA6B – FEBRUARY 2017 – REVISED AUGUST 2017 Product Folder Links: DAC38RF82 DAC38RF89 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Table 42. Register Field Addresses for JESD204B Mode, Interpolation and Clock Phase Programming (continued) Register Field Name Register Register Address Bit(s) Hyperlink HD JESD_N_HD_SCR 0x4E 6 8.5.49 N_M1 4-0 N_M1’ (NPRIME_M1) 12-8 JESD_PHASE_MODE JESD_LN_EN 0x4A 1-0 8.5.45 All registers are paged! 8.3.18.4 Inverse Sinc Filter The DAC38RF82 (or DAC38RF89) has a 9-tap inverse Sinc filter (INVSINC) that runs at the DAC update rate (fDAC) that can be used to flatten the frequency response of the sample-and-hold output. The DAC sample-and- hold output sets the output current and holds it constant for one DAC clock cycle until the next sample, resulting in the well known sin(x)/x or Sinc(x) frequency response (Figure 42, red line). The inverse sinc filter response (Figure 42, blue line) has the opposite frequency response from 0 to 0.4 x fDAC, resulting in the combined response (Figure 42, green line). Between 0 to 0.4 x fDAC, the inverse sinc filter compensates the sample-and- hold roll-off with less than 0.03 dB error. The inverse sinc filter has a gain > 1 at all frequencies. Therefore, the signal input to INVSINC must be reduced from full scale to prevent saturation in the filter. The amount of back-off required depends on the signal frequency, andis set such that at the signal frequencies the combination of the input signal and filter response is less than 1 (0 dB). For example, if the signal input to INVSINC is at 0.25 x fDAC, the response of INVSINC is 0.9 dB, and the signal must be backed off from full scale by 0.9 dB to avoid saturation. The advantage of INVSINC having a positive gain at all frequencies is that the user is then able to optimize the back-off of the signal based on its frequency. The inverse Sinc filters are enabled by field ISFIR_ENA in register MULTIDUC_CFG1 (8.5.13). Figure 42. Composite Magnitude Spectrum for INVSINC 8.3.19 PA Protection Block The DAC38RFxx incorporates an optional power amplifier protection (PAP) block to monitor when the input signal is two large, for example when an interface error occurs, and reduces the output signal power of the DAC. The PAP block achieves the functionality of reducing the input signal that crosses the threshold through three main sub-blocks. These are PAP trigger generation block, PAP gain state machine and GAIN block. |
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