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S1740 Datasheet(PDF) 12 Page - Seiko Instruments Inc |
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S1740 Datasheet(HTML) 12 Page - Seiko Instruments Inc |
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12 / 47 page ![]() POWER MONITORING OUTPUT, 5.5 V INPUT, 100 mA CMOS VOLTAGE REGULATOR WITH 0.5 μA SUPER LOW CURRENT CONSUMPTION S-1740/1741 Series Rev.1.2_00 12 VOUT VIN PMEN *1 VSS + A PMOUT + V Figure 11 Test Circuit 6 Set to Enable VOUT VIN + V PMEN *1 VSS PMOUT + A Figure 12 Test Circuit 7 *1. Only S-1740/1741 Series A / C type Standard Circuit CIN *1 CL *2 Input Output for regulator block GND Single GND VOUT VIN VSS PMEN *4 PMOUT CL *2 CPM *3 Output for power monitor block *1. CIN is a capacitor for stabilizing the input. *2. CL is a capacitor for stabilizing the output. *3. CPM is a capacitor for stabilizing the output. *4. Only S-1740/1741 Series A / C type Figure 13 Caution The above connection diagram and constants will not guarantee successful operation. Perform thorough evaluation including the temperature characteristics with an actual application to set the constants. |
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