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TFP510 Datasheet(PDF) 6 Page - Texas Instruments |
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TFP510 Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 27 page ![]() TFP510 TI PanelBus DIGITAL TRANSMITTER SLDS146B – JANUARY 2002 – REVISED DECEMBER 2002 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Terminal Functions (Continued) TERMINAL I/O DESCRIPTION NAME NO. I/O DESCRIPTION Power and Ground Pins DGND 16, 48, 64 Digital ground DVDD 1, 12, 33 Digital power supply. Must be set to 3.3 V nominal PGND 17 PLL ground PVDD 18 PLL power supply. Must be set to 3.3 V nominal TGND 20, 26, 32 Transmitter differential output driver ground TVDD 23, 29 Transmitter differential output driver power supply. Must be set to 3.3 V nominal absolute maximum ratings over operating free-air temperature (unless otherwise noted)† Supply voltage range, DVDD, PVDD, TVDD –0.5 V to 4 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input voltage, logic/analog signals –0.5 V to 4 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . External DVI single-ended termination resistance, r(T) 0 Ω to open circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . External TFADJ resistance, r(TFADJ) 300 Ω to open circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Storage temperature range, Tstg –65 °C to 150°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Case temperature for 10 seconds 260 °C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Lead temperature 1,6mm (1/16 inch) from case for 10 seconds 260 °C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ESD protection, DVI pins 4 kV Human body model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ESD protection, all other pins 2 kV Human body model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . JEDEC latchup (EIA/JESD78) 100 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions MIN NOM MAX UNIT Supply voltage, VDD (DVDD, PVDD, TVDD) 3 3.3 3.6 V Inp t reference oltage V Low-swing mode 0.55 VDDQ/2† 0.9 V Input reference voltage, VREF High-swing mode DVDD V DVI termination supply voltage, AVDD (see Note 1) At DVI receiver 3.14 3.3 3.46 V DVI Single-ended termination resistance, r(T) (see Note 2) At DVI receiver 45 50 55 Ω TFADJ resistor for DVI-compliant V(SWING) range, r(TFADJ) 400 mV = V(SWING) = 600 mV 505 510 515 Ω Operating free-air temperature range, TA 0 25 70 _C † VDDQ defines the maximum low–level input voltage, it is not an actual input voltage. NOTES: 1. AVDD is the termination supply voltage of the DVI link. 2. r(T) is the single-ended termination resistance at the receiver end of the DVI link. |
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