IC-GF datasheet(22/30 Pages) ICHAUS

22 / 30 page

iC-GF

TRANSCEIVER

Rev F1, Page 22/30

load time cannot be changed (cf. Electrical Characteris-

tics No. 301), only the average value (duty cycle).

DUTYC(1:0)

Addr. 0x03; bit (3:2)

R/W 10

Duty cycle of 1:4

Duty cycle of 1:8

Duty cycle of 1:10

Duty cycle of 1:15

Table 21: Overload detection duty cycle

Spread spectrum oscillator

In SPI mode the spread spectrum operation can be

disabled with the register ENRND.

ENRND

Addr. 0x02; bit (4)

R/W 1

Spread spectrum disabled

Spread spectrum enabled

Table 22: Spread spectrum oscillator

Pull-down currents

In SPI mode the pins NCS and SCLK do only have a

pull-down current.

Undervoltage signalling

Undervoltage at VBO, VCC or VCC3 is signalled in

the status register UVD. A valid undervoltage event is

signalled for the duration of the undervoltage situation

resp. for at least 35 ms (Electrical Characteristics No.

405). Only during this time, the undervoltage event

is signalled in the status register UVD. It will also be

signalled at pin NDIAG. Any confirmed undervoltage

situation at VCC or VCC3 will reset the configuration

INITR; this bit is cleared when read. The SPI interface

is not affected by any of the undervoltage events and is

still operable, provided that the supply level at VCC is

high enough.

UVD(1:0)

Addr. 0x04; bit (7:6)

R 00

No undervoltage detected

Undervoltage at VCC or VCC3

Undervoltage at VBO

Undervoltage at VBO and VCC/VCC3

Table 23: Undervoltage detection

Communication requests

The communication request function (IO-Link wake-up)

allows interrupt signal generation by means of a well

defined short-circuit on one of the switching channels.

This requires the relevant switching channel (Q1 or Q2)

to be connected to the feedback channel input CFI (see

Figure 10). The communication request would be a

contrasting pulse, forcing the selected line to a state

different than the current one (short-circuit).

Figure 10: Communication request pulse genera-

tion

Bit ENSCR enables the communication request func-

tion. By default, communication requests are detected

at channel 1 (Q1 connected to CFI). For detection at

channel 2, the bit SCR2 must be set. As shown in

Figure 11, a communication request is acknowledged

when its duration is inside a defined window (cf. Elec-

trical Characteristics No. 303). The relevant threshold

voltages are given in the Electrical Characteristics Nos.

801, 802, 803 and 804. The example in Table 26 shows

channel 1 used for communication request.

ENSCR

Addr. 0x02; bit (6)

R/W 0

Communication request disabled

Communication request enabled

Table 24: Enable communication request

SCR2

Addr. 0x02; bit (5)

R/W 0

Communication request in channel 1

Communication request in channel 2

Table 25: Communication request channel select

An acknowledged communication request will be

logged in the status bit SCR and signalled at pin NDIAG.

The communication request is not affected by the out-

put disabling (neither by pin nor register OEN), but is

disabled if the configuration in QCFGx is set to "00".

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