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LTC4211CS8 Datasheet(PDF) 17 Page - Linear Technology |
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LTC4211CS8 Datasheet(HTML) 17 Page - Linear Technology |
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17 / 36 page ![]() 17 LTC4211 4211f or by actively limiting the inrush current. The LTC4211 uses GATE voltage slew rate limiting when CLOAD is small and/or the inrush current limit is set high. If GATE voltage slew rate control is preferred with large CLOAD, an external capacitor (CGX) can be used from GATE to ground, as shown in Figure 7. According to Equation 3, adding CGX slows the GATE voltage slew rate at the expense of slower system turn-on and turn-off time. Should this technique be used, values for CGX less than 150nF are recommended. trips, the GATE pin is immediately pulled to ground, the external N-channel MOSFET is quickly turned OFF and FAULT is latched low. The circuit breaker trips whenever the voltage across the sense resistor exceeds two different levels, set by the LTC4211’s SLOW COMP and FAST COMP thresholds (see Block Diagram). The SLOW COMP trips the circuit breaker if the voltage across the SENSE resistor (VCC – VSENSE = VCB) is greater than 50mV for 20µs. There may be appli- cations where this comparator’s response time is not long enough, for example, because of excessive supply voltage noise. To adjust the response time of the SLOW COMP, the MS version of the LTC4211 is chosen and a capacitor is used at the LTC4211’s FILTER pin (see section on Adjust- ing SLOW Comp’s Response Time). The FAST COMP trips the circuit breaker to protect against fast load overcurrents if the transient voltage across the sense resistor is greater than 150mV for 300ns. The response time of the LTC4211’s FAST COMP is fixed. The timing diagram of Figure 6 illustrates when the LTC4211’s electronic circuit breaker is armed. After the first timing cycle, the LTC4211’s FAST COMP is armed at Time Point 5. Arming FAST COMP at Time Point 5 ensures that the system is protected against a short-circuit condition during the second timing cycle after CLOAD has been fully charged. At Time Point 7, SLOW COMP is armed when the internal control loop is disengaged. The timing diagrams in Figures 8 and 9 illustrate the opera- tion of the LTC4211 when the load current conditions exceed the thresholds of the FAST COMP (VCB(FAST) > 150mV) and SLOW COMP (VCB(SLOW) > 50mV), respectively. RESETTING THE ELECTRONIC CIRCUIT BREAKER Once the LTC4211’s circuit breaker is tripped, FAULT is asserted low and the GATE pin is pulled to ground. The LTC4211 remains latched OFF in this fault state until the external fault is cleared. To clear the internal fault detect circuitry and to restart the LTC4211, its ON pin must be driven low (VON < 1.236V) for at least 150µs, after which time FAULT goes high. Toggling the ON pin from low to high (VON > 1.316V) initiates a restart sequence in the LTC4211. The timing diagram in Figure 10 illustrates a OPERATIO M1 Si4410DY RSENSE 0.007 Ω CGX* CLOAD 4211 F07 + VCC SENSE LTC4211** GATE FB R1 36k VOUT 5V 5A VIN 5V R2 15k * ** VALUES ≤150nF SUGGESTED ADDITIONAL DETAILS OMITTED FOR CLARITY = dVGATE dt VGATE SLEW RATE CONTROL 10 µA CGATE + CGX () Figure 7. Using an External Capacitor at GATE for GATE Voltage Slew Rate Control and Large CLOAD An external gate capacitor may also be useful to decrease or eliminate current spikes through the MOSFET when power is first applied. At power-up, the instantaneous in- put voltage step attempts to pull the MOSFET gate up through the MOSFET’s drain-to-gate capacitance. If the MOSFET’s CGS is small, the gate can be pulled up high enough to turn on the MOSFET, thereby allowing a current spike to the output. This event occurs during the time that the LTC4211 is coming out of UVLO and getting its intel- ligence to hold the GATE pin low. An external capacitor attenuates the voltage to which the GATE is pulled up and eliminates the current spike. The value required is depen- dent on the MOSFET capacitance specifications. In typical applications, this capacitor is not required. ELECTRONIC CIRCUIT BREAKER The LTC4211 features an electronic circuit breaker func- tion that protects against supply overvoltage, externally- generated fault conditions and shorts or excessive load current conditions on the supply. If the circuit breaker |
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