AD9229

Rev. B | Page 6 of 40

SWITCHING SPECIFICATIONS

AVDD = 3.0 V, DRVDD = 3.0 V, maximum conversion rate, 2 V p-p differential input, 1.0 V internal reference, AIN = –0.5 dBFS, unless

otherwise noted.

Table 4.

AD9229-50

AD9229-65

Parameter

Temp

Test

Level

Min

Typ

Max

Min

Typ

Max

Unit

CLOCK

Maximum Clock Rate

Full

VI

50

65

MSPS

Minimum Clock Rate

Full

IV

10

10

MSPS

Clock Pulse Width High

Full

VI

8

10

6.2

7.7

ns

Clock Pulse Width Low

Full

VI

8

10

6.2

7.7

ns

OUTPUT PARAMETERS

Full

VI

3.3

6.5

7.9

3.3

6.5

7.9

ns

(20% to 80%)

Full

V

250

250

ps

(20% to 80%)

Full

V

250

250

ps

FCO Propagation Delay

Full

V

6.5

6.5

ns

DCO Propagation Delay

Full

V

ns

Full

IV

250

250

250

250

ps

Full

IV

250

250

250

250

ps

Data-to-Data Skew

Full

IV

±100

±250

±100

±250

ps

Wake-Up Time

25°C

V

4

4

ms

Pipeline Latency

Full

IV

10

10

CLK

cycles

APERTURE

25°C

V

1.8

1.8

ns

Aperture Uncertainty

(Jitter)

25°C

V

<1

<1

ps

rms

OUT-OF-RANGE RECOVERY

TIME

25°C

V

2

2

CLK

cycles