AD9229 datasheet(10/41 Pages) AD

10 / 41 page

AD9229

Rev. B | Page 9 of 40

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

DRGND

DRVDD

DTP

AVDD

AGND

PDWN

AVDD

AGND

VIN+A

VIN–A

AGND

DRVDD

LVDSBIAS

AGND

AVDD

AGND

CLK

AVDD

AGND

VIN+D

VIN–D

AGND

DRGND

AD9229

TOP VIEW

(Not to Scale)

PIN 1

INDICATOR

EXPOSED PADDLE, PIN 0

(Bottom of Package)

NC = NO CONNECT

Figure 3. LFCSP Top View

Table 6. Pin Function Descriptions

Pin No.

Mnemonic

Description

5, 8, 16, 21,

29, 32

AVDD

Analog Supply

6, 9, 12, 15, 22,

25, 28, 31, 33

AGND

Analog Ground

2, 35

DRVDD

Digital Output Supply

1, 36

DRGND

Digital Ground

AGND

Exposed Paddle/Thermal Heat

Slug (Located on Bottom of

Package)

No Connect

DTP

Digital Test Pattern Enable

PDWN

Power-Down Selection (AVDD =

Power Down)

VIN+A

ADC A Analog Input—True

VIN–A

ADC A Analog Input—

Complement

VIN–B

ADC B Analog Input—

Complement

VIN+B

ADC B Analog Input—True

SENSE

Reference Mode Selection

VREF

Voltage Reference Input/Output

REFB

Differential Reference (Bottom)

REFT

Differential Reference (Top)

VIN+C

ADC C Analog Input—True

VIN–C

ADC C Analog Input—

Complement

Pin No.

Mnemonic

Description

VIN–D

ADC D Analog Input—

Complement

VIN+D

ADC D Analog Input—True

CLK

Input Clock

LVDSBIAS

LVDS Output Current Set

Resistor Pin

D–D

ADC D Complement Digital

Output

D+D

ADC D True Digital Output

D–C

ADC C Complement Digital

Output

D+C

ADC C True Digital Output

D–B

ADC B Complement Digital

Output

D+B

ADC B True Digital Output

D–A

ADC A Complement Digital

Output

D+A

ADC A True Digital Output

FCO–

Frame Clock Indicator—

Complement Output

FCO+

Frame Clock Indicator—True

Output

DCO–

Data Clock Output—

Complement

DCO+

Data Clock Output—True

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