AD9289 datasheet(19/33 Pages) AD

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AD9289

Rev. 0 | Page 18 of 32

µF

0.1

µF

VREF

SENSE

0.5V

CONTROL

REFT_A

0.1

µF

0.1

µF

0.1

µF

REFB_A

SELECT

LOGIC

AVDD

A CORE

B CORE

VREF

VIN–C (–D)

SHARED_REF

VIN+C (+D)

REFT_B

0.1

µF

0.1

µF

REFB_B

C CORE

D CORE

VIN–A (–B)

VIN+A (+B)

Figure 32. Shared Reference Mode Enabled

µF

0.1

µF

VREF

SENSE

0.5V

CONTROL

REFT_A

0.1

µF

0.1

µF

0.1

µF

REFB_A

SELECT

LOGIC

A CORE

B CORE

VREF

SHARED_REF

REFT_B

0.1

µF

0.1

µF

REFB_B

C CORE

D CORE

VIN–C (–D)

VIN+C (+D)

VIN–A (–B)

VIN+A (+B)

Figure 33. Internal Reference Configuration

µF

0.1

µF

VREF

SENSE

0.5V

CONTROL

REFT_A

0.1

µF

0.1

µF

0.1

µF

REFB_A

SELECT

LOGIC

A CORE

B CORE

VREF

SHARED_REF

REFT_B

0.1

µF

0.1

µF

REFB_B

C CORE

D CORE

VIN–C (–D)

VIN+C (+D)

VIN–A (–B)

VIN+A (+B)

Figure 34. Programmable Reference Configuration

If the internal reference of the AD9289 is used to drive multiple

converters to improve gain matching, the loading of the refer-

ence by the other converters must be considered. Figure 35

depicts how the internal reference voltage is affected by loading.

ILOAD (mA)

0.05

–0.15

–0.10

–0.05

–0.20

–0.25

–0.30

–0.35

–0.40

1.0

0.5

2.0

1.5

2.5

VREF = 0.5V

VREF = 1.0V

Figure 35. VREF Accuracy vs. Load

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