TMR

TMR

TO

TMR,SRS

C

V

T

I

u

GATE

SS

SS_ON

SS_Dis

1 k

13

TPS23521

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SLVSDX2 – SEPTEMBER 2017

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Copyright © 2017, Texas Instruments Incorporated

Feature Description (continued)

Figure 8. Implementation of SS Disconnect

7.3.3 Timer

Timer is a critical feature in the Hot Swap, which manages the stress level in the MOSFET. The timer will source

and sink current into the timer capacitor as follows:

•

Not in current limit: sink 2 µA

•

–

–

The TPS23521 times out and shuts down the Hot Swap as follows.

•

•

The above behavior maximizes the ability of the Hot Swap to ride out voltage steps, while ensuring that the FET

remains safe even if the part can not ride out a voltage step.

A cool down period follows after the part times out. During this time the timer performs the following:

•

•

•

Repeat the above 64 times

•

Discharge timer to 0 V.

The retry version of the part attempts to restart after finishing the above. The latch version must have the UVEN

signal toggled to retry in addition to completing the 64 cycles. If the UVEN signal is toggled while the 64 cycles

are in progress the part restarts immediately after the 64 cycles are completed.

The timer operates as follows when recovering from POR:

•

–

Proceed to regular startup

–

•

–

Go through 64 charge/discharge cycles

–

–

Proceed to startup

the MOSFET.

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