TMSC6701 datasheet(3/64 Pages) TI

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TMS320C6701

FLOATINGPOINT DIGITAL SIGNAL PROCESSOR

SPRS067E – MAY 1998 – REVISED MAY 2000

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

description

The TMS320C67x DSPs are the floating-point DSP family in the TMS320C6000

™ DSP platform. The

TMS320C6701

(’C6701)

device

based

the

high-performance,

advanced

VelociTI

very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making this DSP an

excellent choice for multichannel and multifunction applications. With performance of up to 1 giga floating-point

operations per second (GFLOPS) at a clock rate of 167 MHz, the ’C6701 offers cost-effective solutions to

high-performance DSP programming challenges. The ’C6701 DSP possesses the operational flexibility of

high-speed controllers and the numerical capability of array processors. This processor has 32 general-purpose

registers of 32-bit word length and eight highly independent functional units. The eight functional units provide

four floating-/fixed-point ALUs, two fixed-point ALUs, and two floating-/fixed-point multipliers. The ’C6701 can

produce two multiply-accumulates (MACs) per cycle for a total of 334 million MACs per second (MMACS). The

’C6701 DSP also has application-specific hardware logic, on-chip memory, and additional on-chip peripherals.

The ’C6701 includes a large bank of on-chip memory and has a powerful and diverse set of peripherals.

Program memory consists of a 64K-byte block that is user-configurable as cache or memory-mapped program

space. Data memory consists of two 32K-byte blocks of RAM. The peripheral set includes two multichannel

buffered serial ports (McBSPs), two general-purpose timers, a host-port interface (HPI), and a glueless external

memory interface (EMIF) capable of interfacing to SDRAM or SBSRAM and asynchronous peripherals.

The ’C6701 has a complete set of development tools which includes: a new C compiler, an assembly optimizer

to simplify programming and scheduling, and a Windows

™ debugger interface for visibility into source code

execution.

device characteristics

Table 1 provides an overview of the ’C6701 DSP. The table shows significant features of each device, including

the capacity of on-chip RAM, the peripherals, the execution time, and the package type with pin count, etc.

Table 1. Characteristics of the ’C6701 Processors

HARDWARE FEATURES

’C6701

EMIF

DMA

4-Channel

Peripherals

Host-Port Interface (HPI)

Peri herals

McBSPs

32-Bit Timers

Internal Program Memory

Size (Bytes)

64K

Internal Program Memory

Organization

64K Bytes Cache/Mapped Program

Internal Data Memory

Size (Bytes)

64K

Internal Data Memory

Organization

2 Blocks: Eight 16-Bit Banks per Block 50/50 Split

Frequency

MHz

120, 150, 167

Cycle Time

6 ns (’6701-167); 6.7 ns (’6701-150); 8.3 ns (’6701-120)

Core (V)

1.8 (’6701-120, -150)

Voltage

Core (V)

1.9 (’6701-167 only)

Voltage

I/O (V)

3.3

PLL Options

CLKIN frequency multiplier

Bypass (x1), x4

BGA Package

35 x 35 mm

352-pin GJC

Process Technology

µm

0.18

µm

Product Status

Product Preview (PP)

Advance Information (AI)

Production Data (PD)

TMS320C6000 is a trademark of Texas Instruments.

Windows is a registered trademark of Microsoft Corporation.

TMSC6701 Datasheet(PDF) 3 Page - Texas Instruments

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