AD7764 datasheet(31/34 Pages) AD

31 / 34 page

AD7764

Data Sheet

Rev. B | Page 30 of 33

USING THE AD7764

Use the following sequence to power up and use the AD7764:

1. Apply power to the device.

2. Apply the MCLK signal.

3. Take RESET low for a minimum of one MCLK cycle, pref-

erably synchronous to the falling MCLK edge. If multiple

devices are to be synchronized, apply a common RESET to

all devices.

4. Wait a minimum of two MCLK cycles after RESET is released.

5. If multiple devices are being synchronized, a SYNC pulse

must be applied to the devices, preferably synchronous with

the MCLK rising edge. In the case where devices are not

being synchronized, no SYNC pulse is required; apply a

logic high signal to the SYNC pin.

When applying the SYNC pulse,

•

The issue of a SYNC pulse to the device must not

coincide with a write to the device.

•

Ensure that the SYNC pulse is taken low for a

minimum of four MCLK periods.

Data can then be read from the device using the default gain

and overrange threshold values. The conversion data read is not

valid, however, until the settling time of the filter elapses. After

this time elapses, the FILTER_SETTLE status bit is set, indicating

that the data is valid.

Values for the gain and overrange thresholds can be written to

or read from the respective registers at this stage.

BIAS RESISTOR SELECTION

The AD7764 requires a resistor to be connected between the RBIAS

and AGNDx pins. Select the resistor value to give a current of

25 µA through the resistor to ground. For a 4.096 V reference

voltage, the correct resistor value is 160 kΩ.

AD7764 Datasheet(PDF) 31 Page - Analog Devices