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AD7690 Datasheet(PDF) 19 Page - Analog Devices

Part # AD7690
Description  400 kSPS PulSAR Differential ADC in MSOP/LFCSP
PDF  25 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD7690 Datasheet(HTML) 19 Page - Analog Devices

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AD7690
Data Sheet
Rev. C | Page 18 of 24
CS MODE, 3-WIRE WITH BUSY INDICATOR
This mode is usually used when a single AD7690 is connected
to an SPI-compatible digital host having an interrupt input.
The connection diagram is shown in Figure 36, and the
corresponding timing is given in Figure 37.
With SDI tied to VIO, a rising edge on CNV initiates a
conversion, selects the CS mode, and forces SDO to high
impedance. SDO is maintained in high impedance until the
completion of the conversion irrespective of the state of CNV.
Prior to the minimum conversion time, CNV can be used to
select other SPI devices, such as analog multiplexers, but CNV
must be returned low before the minimum conversion time
elapses and then held low for the maximum possible conversion
time to guarantee the generation of the busy signal indicator.
When the conversion is complete, SDO goes from high
impedance to low impedance. With a pull-up on the SDO line,
this transition can be used as an interrupt signal to initiate the
data reading controlled by the digital host. The AD7690 then
enters the acquisition phase and powers down. The data bits are
clocked out, MSB first, by subsequent SCK falling edges. The
data is valid on both SCK edges. Although the rising edge can
be used to capture the data, a digital host using the SCK falling
edge allows a faster reading rate, provided it has an acceptable
hold time. After the optional 19th SCK falling edge or when
CNV goes high (whichever occurs first), SDO returns to high
impedance.
If multiple AD7690s are selected at the same time, the SDO
output pin handles this contention without damage or induced
latch-up. Meanwhile, it is recommended to keep this contention
as short as possible to limit extra power dissipation.
Figure 36. 3-Wire CS Mode with Busy Indicator
Connection Diagram (SDI High)
Figure 37. 3-Wire CS Mode with Busy Indicator Serial Interface Timing (SDI High)
DATA IN
IRQ
CLK
CONVERT
VIO
DIGITAL HOST
47kΩ
CNV
SCK
SDO
SDI
VIO
AD7690
SDO
D17
D16
D1
D0
tDIS
SCK
1
2
3
17
18
19
tSCK
tSCKL
tSCKH
tHSDO
tDSDO
CNV
CONVERSION
ACQUISITION
tCONV
tCYC
ACQUISITION
SDI = 1
tCNVH
tACQ



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