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LTC3713

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loss. For example, if RDS(ON) = 0.01Ω and RL = 0.005Ω, the

loss will range from 1% up to 10% as the output current

varies from 1A to 10A for a 1.5V output.

2. Transition loss. This loss arises from the brief amount

of time the top MOSFET spends in the saturated region

during switch node transitions. It depends upon the input

voltage, load current, driver strength and MOSFET capaci-

tance, among other factors. The loss is significant at input

voltages above 20V and can be estimated from:

Transition Loss

≅ (1.7A–1) VIN2 IOUT CRSS f

3. INTVCC current. This is the sum of the MOSFET driver

and control currents.

4. CIN loss. The input capacitor has the difficult job of

filtering the large RMS input current to the regulator. It

must have a very low ESR to minimize the AC I2R loss and

sufficient capacitance to prevent the RMS current from

causing additional upstream losses in fuses or batteries.

Other losses, including COUT ESR loss, Schottky diode D1

conduction loss during dead time and inductor core loss

generally account for less than 2% additional loss.

When making adjustments to improve efficiency, the input

current is the best indicator of changes in efficiency. If you

make a change and the input current decreases, then the

efficiency has increased. If there is no change in input

current, then there is no change in efficiency.

Checking Transient Response

The regulator loop response can be checked by looking

at the load transient response. Switching regulators take

several cycles to respond to a step in load current. When

a load step occurs, VOUT immediately shifts by an amount

equal to

∆ILOAD (ESR), where ESR is the effective series

resistance of COUT. ∆ILOAD also begins to charge or

discharge COUT generating a feedback error signal used

by the regulator to return VOUT to its steady-state value.

During this recovery time, VOUT can be monitored for

overshoot or ringing that would indicate a stability

problem. The ITH pin external components shown in

Figure 1 will provide adequate compensation for most

applications. For a detailed explanation of switching

control loop theory see Application Note 76.

Design Example

As a design example, take a supply with the following

specifications: VIN = 1.8V to 3.3V, VOUT = 1.25V ±100mV,

IOUT(MAX) = 6A, f = 300kHz. First, calculate the timing

resistor with VON = VOUT:

kHz

ON ==

– .

)

( .

)(

)

2 5

300

240

Next, use a standard value of 237k and choose the inductor

for about 40% ripple current at the maximum VIN:

kHz









=µ

125

300

0 4 6

125

108

(

)( . )(

)

–

Selecting a standard value of 1

µH results in a maximum

ripple current of:

∆=









kHz

125

300

125

()(

)

–

Next, choose the synchronous MOSFET switch. Choosing

an IRF7811A (RDS(ON) = 0.013Ω, CRSS = 60pF, θJA =

°C/W) yields a nominal sense voltage of:

VSNS(NOM) = (6A)(1.3)(0.013Ω) = 101.4mV

Tying VRNG to 1V will set the current sense voltage range

for a nominal value of 100mV with current limit occurring

at 133mV. To check if the current limit is acceptable,

assume a junction temperature of about 10

°C above a

°C ambient with ρ60°C = 1.15:

LIMIT ≥

Ω

133

1 15 0 013

2 6

10 2

)( .

)

and double check the assumed TJ in the MOSFET:

BOT =









Ω

125

10 2

1 15 0 013

024

.– .

)( .

)

TJ = 50°C + (0.24W)(50°C/W) = 62°C

Now check the power dissipation of the top MOSFET at

current limit with

ρ80°C = 1.3:

APPLICATIO S I FOR ATIO

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