TAS5825M datasheet(39/71 Pages) TI1

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TAS5825M

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SLASEH7 – JANUARY 2018

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8.6.1.23 EEPROM_CTRL0 Register (Offset = 56h) [reset = 0x00]

EEPROM_CTRL0 is shown in Figure 36 and described in Table 28.

Return to Summary Table.

Figure 36. EEPROM_CTRL0 Register

RESERVED

EEPROM_ADD

R_24BITS_EN

ABLE

SPI_CLK_RATE

SPI_INV_POLA

SPI_MST_LSB

LOAD_EEPRO

M_START

R/W

Table 28. EEPROM_CTRL0 Register Field Descriptions

Bit

Field

Type

Reset

Description

7-6

RESERVED

R/W

This bit is reserved

EEPROM_ADDR_24BITS

_ENABLE

R/W

enable 24 bits mode for EEPROM address

4-3

SPI_CLK_RATE

R/W

0: spi clock rate = 1.25MHz

1: spi clock rate = 2.5MHz

2: spi clock rate = 5MHz

3: spi clock rate = 10MHz

SPI_INV_POLAR

R/W

0: spi serial data change at post edge SCK

1: spi serial data change at neg edge SCK

SPI_MST_LSB

R/W

0: msb first 1: lsb first

LOAD_EEPROM_START

R/W

0: dsp coefficients read from host

1: dsp coefficients read from EEPROM

8.6.1.24 EEPROM_RD_CMD Register (Offset = 57h) [reset = 0x03]

EEPROM_RD_CMD is shown in Figure 37 and described in Table 29.

Return to Summary Table.

Figure 37. EEPROM_RD_CMD Register

EEPROM_RD_CMD

R/W-00000011

Table 29. EEPROM_RD_CMD Register Field Descriptions

Bit

Field

Type

Reset

Description

7-0

EEPROM_RD_CMD

R/W

00000011

EEPROM read command

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