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TUSB1210 Datasheet(PDF) 44 Page - Texas Instruments

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Part # TUSB1210
Description  Stand-Alone USB Transceiver Chip Silicon
PDF  66 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TUSB1210 Datasheet(HTML) 44 Page - Texas Instruments

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TUSB1210
SLLSE09H – NOVEMBER 2009 – REVISED JUNE 2015
www.ti.com
5.4.1.1.32 VENDOR_SPECIFIC1_STS
ADDRESS OFFSET
0x83
PHYSICAL ADDRESS
0x83
INSTANCE
USB_SCUSB
DESCRIPTION
Indicates the current value of the interrupt source signal.
TYPE
R
WRITE LATEN CY
7
6
5
4
3
2
1
0
Reserved
ID_RESC_STS
ID_RESB_STS
ID_RESA_STS
BVALID_STS
BITS
FIELD NAME
DESCRIPTION
TYPE
RESET
7
Reserved
R
0
6
MNTR_VUSBIN_OK_STS
Current value of MNTR_VUSBIN_OK output
R
0
5
ABNORMALSTRESS_STS
Current value of ABNORMALSTRESS output
R
0
4
ID_FLOAT_STS
Current value of ID_FLOAT output
R
0
3
ID_RESC_STS
Current value of ID_RESC output
R
0
2
ID_RESB_STS
Current value of ID_RESB output
R
0
1
ID_RESA_STS
Current value of ID_RESA output
R
0
0
BVALID_STS
Current value of VB_SESS_VLD output
R
0
5.4.1.1.33 VENDOR_SPECIFIC1_LATCH
ADDRESS OFFSET
0x84
PHYSICAL ADDRESS
0x84
INSTANCE
USB_SCUSB
DESCRIPTION
These bits are set by the PHY when an unmasked change occurs on the corresponding internal signal.
The PHY will automatically clear all bits when the Link reads this register, or when Low Power Mode is
entered. The PHY also clears this register when Serial mode is entered regardless of the value of
ClockSuspendM.
The PHY follows the rules defined in Table 26 of the ULPI spec for setting any latch register bit.
TYPE
R
WRITE LATENCY
7
6
5
4
3
2
1
0
Reserved
44
Detailed Description
Copyright © 2009–2015, Texas Instruments Incorporated
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