HT45F77 datasheet(20/203 Pages) HOLTEK

20 / 203 page

Rev. 1.20

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Rev. 1.20

De�e��e� 1�� 201�

HT45F77

Body Fat Scale Flash MCU

HT45F77

Body Fat Scale Flash MCU

System Architecture

Akeyfactorinthehigh-performancefeaturesoftheHoltekrangeofmicrocontrollersisattributedto

theirinternalsystemarchitecture.Therangeofthedevicetakeadvantageoftheusualfeaturesfound

withinRISCmicrocontrollersprovidingincreasedspeedofoperationandenhancedperformance.

Thepipeliningschemeisimplementedinsuchawaythatinstructionfetchingandinstruction

executionareoverlapped,henceinstructionsareeffectivelyexecutedinoneortwocyclesfor

mostofthestandardorextendedinstructionsrespectively,withtheexceptionofbranchorcall

instructionswhichneedonemorecycle.An8-bitwideALUisusedinpracticallyallinstructionset

operations,whichcarriesoutarithmeticoperations,logicoperations,rotation,increment,decrement,

branchdecisions,etc.TheinternaldatapathissimplifiedbymovingdatathroughtheAccumulator

andtheALU.CertaininternalregistersareimplementedintheDataMemoryandcanbedirectly

orindirectlyaddressed.Thesimpleaddressingmethodsoftheseregistersalongwithadditional

architecturalfeaturesensurethataminimumofexternalcomponentsisrequiredtoprovidea

functionalI/OandA/Dcontrolsystemwithmaximumreliabilityandflexibility.Thismakesthe

devicesuitableforlow-cost,high-volumeproductionforcontrollerapplications.

Clocking and Pipelining

Themainsystemclock,derivedfromeitheraHXT,LXT,HIRCorLIRCoscillatorissubdivided

intofourinternallygeneratednon-overlappingclocks,T1~T4.TheProgramCounterisincremented

atthebeginningoftheT1clockduringwhichtimeanewinstructionisfetched.Theremaining

T2~T4clockscarryoutthedecodingandexecutionfunctions.Inthisway,oneT1~T4clock

cycleformsoneinstructioncycle.Althoughthefetchingandexecutionofinstructionstakesplace

inconsecutiveinstructioncycles,thepipeliningstructureofthemicrocontrollerensuresthat

instructionsareeffectivelyexecutedinoneinstructioncycle.Theexceptiontothisareinstructions

wherethecontentsoftheProgramCounterarechanged,suchassubroutinecallsorjumps,inwhich

casetheinstructionwilltakeonemoreinstructioncycletoexecute.

Fe tc h In st . ( PC )

Ex ec ut e In st . (P C- 1)

Fe tc h In st . ( PC +1 )

Ex ec ut e In st . (P C)

Fe tc h In s t. (P C+ 2)

Ex ec ut e In st . (P C+ 1)

PC +1

PC +2

O sci ll at or C lo ck

(S yst em C lo ck)

P has e Cl o ck T 1

Pr og ra m C oun te r

P has e Cl o ck T 2

P has e Cl o ck T 3

P has e Cl o ck T 4

Pi pel in in g

System Clocking and Pipelining

HT45F77 Datasheet(PDF) 20 Page - Holtek Semiconductor Inc

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