MP2325

– 24V, 3A SYNC STEP DOWN CONVERTER

MP2325 Rev. 1.0

www.MonolithicPower.com

10

12/4/2013

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100k resistor should be large enough for all the

applications.

The chip can be synchronized to external clock

range from 200kHz up to 2MHz through this pin

2ms right after output voltage is set, with the

internal clock rising edge synchronized to the

external clock rising edge. EN synchronize logic

high

voltage

should higher

than 2V.

EN

synchronize logic low voltage should lower than

400mV. EN logic high pulse width must less

than 1.6µs. Otherwise the internal clock may

come and turn on high side MOSFET again. EN

logic low pulse width must less than 6µs,

otherwise MP2325 may EN shutdown.

Power Good Indicator

The MP2325 has an open drain pin for power

good indicator. When FB pin is higher than 90%

of regulation voltage, PG pin is pulled up to

VCC by the external resistor. If FB pin voltage

drop down to 85% of the regulation voltage, PG

pin is pulled down to ground by an internal

MOS FET.

Under-Voltage Lockout (UVLO)

Under-voltage lockout (UVLO) is implemented

to protect the chip from operating at insufficient

supply voltage. The MP2325 UVLO comparator

monitors the output voltage of the internal

regulator, VCC. The UVLO rising threshold is

about

3.9V

while

its

falling

threshold

is

consistent 3.25V.

Internal Soft-Start

The soft start is implemented to prevent the

converter output voltage from overshooting

during start up. When the chip starts, the

internal circuitry generates a soft-start voltage

(SS) ramping up from 0V. The soft-start period

lasts until the voltage on the soft-start capacitor

exceeds the reference voltage of 0.8V. At this

point the reference voltage takes over. The soft-

start time is internally set to be around 1.5ms.

Over-Current-Protection and Hiccup

The MP2325 has cycle-by-cycle over current

limit when the inductor current peak value

exceeds

the

set

current

limit

threshold.

Meanwhile, output voltage starts to drop until

FB is below the Under-Voltage (UV) threshold,

typically 50% below the reference. Once a UV

is triggered, the MP2325 enters hiccup mode to

periodically restart the part. This protection

mode is especially useful when the output is

dead-short to ground. The average short circuit

current is greatly reduced to alleviate the

thermal issue and to protect the regulator. The

MP2325 exits the hiccup mode once the over

current condition is removed.

Thermal Shutdown

Thermal shutdown is implemented to prevent

the chip from operating at exceedingly high

temperatures. When the silicon die temperature

is higher than 150°C, it shuts down the whole

chip. When the temperature is lower than its

lower threshold, typically 130°C, the chip is

enabled again.

Floating Driver and Bootstrap Charging

The floating power MOSFET driver is powered

by an external bootstrap capacitor. This floating

driver has its own UVLO protection. This

UVLO’s rising threshold is 2.2V with a

hysteresis of 150mV. The bootstrap capacitor

voltage is regulated internally by VIN through

D1, R5, C5, L1 and C2 (Figure 4). If (VIN-VSW)

is more than 5V, U1 will regulate M1 to maintain

a 5V BST voltage across C5.

5

R5

Figure 4: Internal Bootstrap Charging Circuit

Startup and Shutdown

appropriate thresholds, the chip starts. The

reference block starts first, generating stable

reference voltage and currents, and then the

internal regulator is enabled. The regulator

provides

stable

supply

for

the

remaining

circuitries.

Three events can shut down the chip: EN low,

VIN low and thermal shutdown. In the shutdown

procedure, the signaling path is first blocked to