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MP2454 Datasheet(PDF) 13 Page - Monolithic Power Systems |
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MP2454 Datasheet(HTML) 13 Page - Monolithic Power Systems |
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13 / 19 page ![]() MP2454―36V, 0.6A, STEP-DOWN CONVERTER MP2454 Rev. 1.01 www.MonolithicPower.com 13 9/18/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. chip shuts down. When the temperature falls below the lower threshold (145oC), the chip is enabled again. Current Comparator and Current Limit A current sense MOSFET senses accurately the power MOSFET current. The sensed current goes to the high-speed current comparator for current-mode control. When the power MOSFET turns on, the comparator is blanked first (until the end of the turn-on transition) to reduce noise. Then, the comparator compares the power- switch current against the reference current set by the COMP voltage. When the power-switch current exceeds the reference current, the comparator outputs low to turn off the power MOSFET. The maximum current of the internal power MOSFET is limited internally cycle-by-cycle. The current limit is related to the FB voltage and deceases as Vo decreases, which prevents inductor current runaway during start-up or an output short circuit. Start-Up and Shutdown If both VIN and VEN exceed their respective thresholds, the chip starts up. The reference block starts first, generating a stable reference voltage and stable currents, and then the internal regulator is enabled. The regulator provides a stable supply for the rest of the circuit. After this occurs, the soft-start block starts working and output ramps up slowly. Three events shut down the chip: VEN low, VIN low, and thermal shutdown. During shutdown, the signaling path is blocked initially to avoid triggering any faults. Then the COMP voltage and the internal supply rail are pulled down. Power Good Output The MP2454 includes an open-drain power good output that indicates whether the regulator’s output is within ±10% of its nominal value. When the output voltage falls outside this range, the POK output is pulled to ground. It should be connected to a voltage source of no more than 5V through a resistor (e.g. 100kΩ). There is a 20µs de-glitch time when POK asserts high (if POKDL is left floating). The de-glitch time can be programmed by adding a capacitor on POKDL. To select a capacitor for POKDL, use Equation (2): (V) V A) ( I (ms) t (nF) C th_POKDL POKDL POKDL DL (2) Where IPOKDL is the POKD source current, and Vth_POKDL is 1.2V. . |
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