MP8719 – 26V, 12A, HIGH-CURRENT, SYNC BUCK CONVERTER WITH ±1A LDO

MP8719 Rev1.01

www.MonolithicPower.com

14

8/3/2017

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If the output is pre-biased to a certain voltage

during start-up, the IC disables the switching of

both the high-side and low-side switches until

the voltage on the internal reference exceeds

the sensed output voltage at the FB node.

Soft Shutdown

The

MP8719

employs

a

soft

shutdown

mechanism for DDR to ensure that VTTREF

and VTT follow exactly half of the VDDQ. When

EN2 is low, the internal reference then ramps

down gradually, so the output voltage falls

linearly (see Figure 8).

Figure 8: Soft Shutdown Sequence

VDDQ Over-Current Limit (OCL)

The MP8719 has cycle-by-cycle over-current

limiting control. The current-limit circuit employs

a valley current-sensing algorithm. The MP8719

sensing element. If the magnitude of the

current-sense signal is above the current-limit

threshold, the PWM is not allowed to initiate a

new cycle, even if FB is lower than REF (see

Figure 9).

Figure 9: Valley Current-Limit Control

Since the comparison is done during the LS-

FET on state, the OC trip level sets the valley

level of the inductor current. The maximum load

be calculated using Equation (2):



OC

I

II _ limit

2

(2)

The over-current limit (OCL) limits the inductor

current and does not latch off. In an over-

current condition, the current to the load

exceeds the current to the output capacitor, so

the output voltage tends to fall off. Eventually,

the currents ends up crossing the under-voltage

protection (UVP) threshold and latches off.

Fault latching can be reset by EN going low or

cycling the power of VIN.

VTT/VTTREF Over-Current Protection (OCP)

The VTT LDO has an internal, non-latched,

fixed current limit of 1.5A for both sink and

source operation. Once the current limit is

reached, the gate of the sink/source MOSFET

is adjusted to limit the current. VTTREF also

has an internal non-latch 15mA current limit.

VDDQ Over/Under-Voltage Protection (OVP,

UVP)

The MP8719 monitors a resistor divided

feedback voltage to detect over and under

voltage. When the feedback voltage rises

higher than 130% of the target voltage, the

OVP comparator output goes high, the circuit

latches as the HS-FET turns off, and the LS-

FET turns on, acting as a -2A current source.

To protect the MP8719 from damage, there is

reaches this value, it latches off as well. The

LS-FET behaves the same as it does at 130%

OVP.

When the feedback voltage drops below 75% of

UVP-1 comparator output goes high, and the

about 30µs (latching the HS-FET off and the

LS-FET on). The LS-FET remains on until the

inductor current reaches zero. During this

period, the valley current limit helps control the

inductor current.