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MP8867GLE Datasheet(PDF) 14 Page - Monolithic Power Systems |
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MP8867GLE Datasheet(HTML) 14 Page - Monolithic Power Systems |
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14 / 27 page ![]() MP8867 – SYNCHRONOUS STEP-DOWN CONVERTER MP8867 Rev.1.01 www.MonolithicPower.com 14 2/21/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. OPERATION The MP8867 is a high-frequency, synchronous rectified, step-down, switch-mode converter with built-in power MOSFETs. It offers a very compact solution that achieves an 8A output current with excellent load and line regulation over a wide input supply range. The MP8867 has three working modes: continuous conduction mode (CCM), advanced asynchronous modulation (AAM) mode, and discontinuous conduction mode (DCM). The MP8867’s default operation mode is CCM. The register of the MODE bit (reg01 [0]) in the I2C can be set to “0.” CCM Control Operation In CCM, the internal clock initiates the PWM cycle, and the HS-FET turns on and remains on until VILsense reaches the value set by VCOMP. After a period of dead time, the LS-FET turns on and remains on until the next clock cycle begins. The device repeats this operation in every clock cycle to regulate the output voltage. If VILsense does not reach the value set by VCOMP within 95% (500kHz switching frequency) of one PWM period, the HS-FET is forced off. AAM Control Operation In a light-load condition, the MP8867 works in AAM mode if the mode bit is set to “0” (see Figure 2). VAAM is fixed internally when the input and output voltages are fixed. VCOMP is the error amplifier output, which represents the peak inductor current information. When the VCOMP is lower than VAAM, the internal clock is blocked, and the MP8867 skips some pulses, achieving the light-load power save. Refer to AN032 for additional details. The internal clock resets every time VCOMP is higher than VAAM. The HS-FET turns on and remains on until VILsense reaches the value set by VCOMP. The light-load feature in this device is optimized for 12V input applications. Figure 2: Simplified AAM Control Logic DCM Control Operation VCOMP ramps up with the increase of the output current. When its minimum value exceeds VAAM, the device enters DCM. In this mode, the internal clock initiates the PWM cycle, and the HS-FET turns on and remains on until VILsense reaches the value set by VCOMP (see Figure 3). After a period of dead time, the LS-FET turns on and remains on until the inductor current value decreases to zero. The device will repeat the same operation in every clock cycle to regulate the output voltage. IL Figure 3: DCM Control Operation VCC Regulator A 5V internal regulator powers most of the internal circuitries. This regulator takes the VIN input and operates in the full VIN range. When VIN is greater than 5.0V, the output of the regulator is in full regulation. When VIN is lower than 5.0V, the output voltage decreases and follows the input voltage. A 0.47μF ceramic capacitor is required for decoupling purposes. Error Amplifier (EA) The error amplifier compares the FB voltage against the internal reference (REF) for the FB control loop and outputs the COMP voltage, which controls the power MOSFET current. In I2C mode, FB is opened and VOUT is connected to an EA non-inverter input. The optimized internal compensation network minimizes the external component count and simplifies the control loop design. |
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