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MP5600EU Datasheet(PDF) 9 Page - Monolithic Power Systems |
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MP5600EU Datasheet(HTML) 9 Page - Monolithic Power Systems |
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9 / 26 page ![]() MP5600-COMPACT MULTIPLE-OUTPUT POWER SUPPLY FOR TV-LCD PANEL MP5600 Rev. 0.9 www.MonolithicPower.com 9 10/19/2009 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2009 MPS. All Rights Reserved. PIN FUNCTIONS (continued) Pin # Name Description 18 BST Buck Regulator Bootstrap Pin. Connect a capacitor between this pin and SWBK to form a floating supply to drive the internal MOSFET. 0.1µF is recommended for most application. 19.20 SWBK Buck Regulator Switching Output. SWBK is the source of the internal N-channel MOSFET. Connect the inductor and schottky diode to SWBK pin. 21 VBK Buck Regulator Output Pin. Connect buck regulator output to this pin. 22,23 IN1,IN2 Buck Regulator Power Input Pin. Drain of the internal N-channel MOSFET. 24 IN3 Input Pin for powering internal 5V regulator and logic circuitry. Bypass this pin to GND with a capacitor. A 0.22µF is enough for most application. 25 FSEL Switching Frequency Select Pin. If FSEL is connected to GND, the switching frequency is set to 450kHz, if FSEL is connected to VCC, the switching frequency is set to 675kHz. 26 EN1 Buck and Negative Charge Pump Regulator Enable Pin. High level enables buck regulator, Low level disables buck regulator. 27 DLY2 Positive Charge Pump Delay Pin. Connect a capacitor from DLY2 and GND to set the delay time between the boost startup and the startup of positive charge pump regulator. 28 VCC 5V Internal Regulator Output Pin. Bypass VCC to GND with 1μF ceramic capacitor. It provides power for the internal reference, logic and driving circuit. 29 EN2 Boost and Positive Charge Pump Regulator Enable Pin. High level enables boost regulator, Low level disables boost regulator. EN2 is not effective before EN1 is high. 30,31 PGND Power Ground. It is refer to boost regulator. 32,33 SWBT Boost Regulator Power Switching Output. SWBT is the drain of the internal MOSFET. Connect the inductor and Schottky to both SWBT pins. 34 SWI Boost Regulator Internal N-Channel MOSFET Pass Switch Input. It is the drain of internal isolation MOSFET. Connect the cathode of Schottky to SWI. 35 SWO Boost Regulator Internal N-Channel MOSFET Pass Switch Output. It is the source of internal isolation MOSFET. SWO is the real boost regulator output. 36 FBBT Boost Regulator Feedback Pin. Connect FBBT to the center of a resistor divider between the boost regulator output and GND to set the boost regulator output voltage. 37 COMP Boost Regulator Compensation Pin. This pin is used to compensate the regulator control loop. Connect a capacitor or a series RC network from COMP pin to GND. 38 PG Power Good Pin. Open-Drain Power Good Output indicator for buck regulator. 39 DLY3 Power Good Delay Pin. Connect a capacitor from DLY3 to GND to set the delay time between buck regulator and PG indication signal. 40 AGND Analog Ground EP GND Exposed Paddle (GND) |
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