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LTC4013

4013fa

OPERATION

Table 4. RT Resistor Value

Switching Frequency

RT (Ω)

1MHz

40.2k

750kHz

54.9k

500kHz

86.6k

300kHz

150k

200kHz

232k

The absorption and Li-Ion termination timer cycles start

when the charger transitions from constant-current to

constant-voltage charging. Equalization timing starts im-

mediately upon transition to the equalization charge state

andlowbatterytimingcommenceswhenFBfallsbelowLB.

Low Battery (LB) Pin

The LB pin is used to program the low battery level and

is compared internally to the FB pin voltage. The LB pin

sources a very precise 20µA current so the threshold volt-

age can be programmed simply by placing a resistor from

LB to ground. For instance, 100k to ground sets the LB pin

to 2.0V. In 2-stage and Li-Ion charging a transition below

the LB threshold triggers a new charge cycle if terminated.

In 3-stage and 4-stage a transition below the LB threshold

returns the charger to the absorption charging phase. In

all four modes, Li-Ion, 2-stage, 3-stage and 4-stage, and

with a timer capacitor present, the low battery fault timer

starts and the charge current is reduced to C/5. All four

modes terminate charging if the low-battery timer expires.

A commonly used low-battery voltage for a 6 cell battery

is 10.4V which represents the voltage with one of 6 cells

shorted. This LB voltage is set with an 86.6k resistor for

1.73V/cell, or 10.4V/6 with a 6-to-1 FB divider.

Output Current Monitoring

Chargecurrentcanbedeterminedbyobservingthevoltage

at the ISMON pin. ISMON follows the expression:

ISMON = 20 • (VSENSE - VBAT).

Programming Switching Frequency

The LTC4013 has an operational switching frequency

range between 200kHz and 1MHz which is programmed

with an external resistor from the RT pin to ground. Table

4showsresistorvaluesandtheircorrespondingswitching

frequencies. An approximate formula is:

RT(kΩ)=

40.2

fSW 1.088 (MHz)

Switching Frequency Synchronization

The internal oscillator may also be synchronized to an

external clock through the SYNC pin. The signal applied

to the SYNC pin must have a logic low below 1.3V and

a logic high above 1.7V. The input sync frequency must

be 20% higher than the frequency that would otherwise

be determined by the resistor at the RT pin. Input sig-

nals outside of these specified parameters cause erratic

switching behavior and subharmonic oscillations. When

synchronizing to an external clock, be aware that there is

a fixed delay from the input clock edge to the edge of the

signal at the SW pin. Ground the SYNC pin if synchroniza-

tion to an external clock is not required.

INFET Behavior

The LTC4013 controls an input N-Channel MOSFET via an

on-chip charge pump on INFET. The MOSFET provides a

blocking path to prevent battery discharge when the input

voltageisbelowthebatteryvoltage.Italsodisconnectsthe

inputsupplyfromthechargertomeasuretheinputvoltage

with no load for Maximum Power Point Tracking (MPPT).

Undervoltage Lockouts

The INFET charge pump and switching regulator are

enabled when all four UVLO comparators are satisfied

and the ENAB pin is above its precision enable threshold.

Specifically, VIN must be above its absolute threshold of

3.45V,DCINmustbegreaterthanBATbyatleast99mVand

must also be within 4mV of VIN. A fourth UVLO requires

that the battery voltage at SENSE be above its UVLO level

of approximately 1.97V.

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