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LTC7813

7813f

For more information www.linear.com/LTC7813

applicaTions inForMaTion

Table 2 summarizes the different states in which the FREQ

pin can be used.

Table 2

FREQ PIN

PLLIN/MODE PIN

FREQUENCY

DC Voltage

350kHz

INTVCC

DC Voltage

535kHz

Resistor to GND

DC Voltage

50kHz to 900kHz

Any of the Above

External Clock

75kHz to 850kHz

Phase Locked to

External Clock

Minimum On-Time Considerations

Minimum on-time, tON(MIN), is the smallest time duration

that the LTC7813 is capable of turning on the top MOSFET

(bottomMOSFETfortheboostcontroller).Itisdetermined

by internal timing delays and the gate charge required to

turn on the top MOSFET. Low duty cycle applications may

approach this minimum on-time limit and care should be

taken to ensure that:

tON(MIN)_BUCK <

VOUT

VIN(f)

tON(MIN)_BOOST <

VOUT − VIN

VOUT(f)

If the duty cycle falls below what can be accommodated

by the minimum on-time, the controller will begin to skip

cycles. The output voltage will continue to be regulated,

but the ripple voltage and current will increase.

The minimum on-time for the LTC7813 is approximately

80ns for the buck and 120ns for the boost. However, for

the buck channels as the peak sense voltage decreases

the minimum on-time gradually increases up to about

130ns. This is of particular concern in forced continuous

applications with low ripple current at light loads. If the

duty cycle drops below the minimum on-time limit in this

situation, a significant amount of cycle skipping can occur

with correspondingly larger current and voltage ripple.

Efficiency Considerations

The percent efficiency of a switching regulator is equal to

the output power divided by the input power times 100%.

It is often useful to analyze individual losses to determine

what is limiting the efficiency and which change would

produce the most improvement. Percent efficiency can

be expressed as:

%Efficiency = 100% – (L1 + L2 + L3 + ...)

where L1, L2, etc. are the individual losses as a percent-

age of input power.

Although all dissipative elements in the circuit produce

losses, four main sources usually account for most of the

losses in LTC7813 circuits: 1) IC VBIAS current, 2) DRVCC

regulator current, 3) I2R losses, 4) Topside MOSFET

transition losses.

1. The VBIAS current is the DC supply current given in the

Electrical Characteristics table, which excludes MOS-

FET driver and control currents. VBIAS current typically

results in a small (<0.1%) loss.

2. DRVCC current is the sum of the MOSFET driver and

control currents. The MOSFET driver current results

from switching the gate capacitance of the power

MOSFETs. Each time a MOSFET gate is switched from

low to high to low again, a packet of charge, dQ, moves

from DRVCC to ground. The resulting dQ/dt is a cur-

rent out of DRVCC that is typically much larger than the

control circuit current. In continuous mode, IGATECHG

= f(QT + QB), where QT and QB are the gate charges of

the topside and bottom side MOSFETs.

SupplyingDRVCCfromanoutput-derivedsourcepower

through EXTVCC will scale the VIN current required for

thedriverandcontrolcircuitsbyafactorof(DutyCycle)/

(Efficiency). For example, in a 20V to 5V application,

10mA of DRVCCcurrentresultsinapproximately2.5mA

of VIN current. This reduces the midcurrent loss from

10% or more (if the driver was powered directly from

VIN) to only a few percent.

3. I2R losses are predicted from the DC resistances of the

fuse (if used), MOSFET, inductor, current sense resis-

tor and input and output capacitor ESR. In continuous

mode the average output current flows through L and

RSENSE, but is chopped between the topside MOSFET

and the synchronous MOSFET. If the two MOSFETs

have approximately the same RDS(ON), then the resis-

tance of one MOSFET can simply be summed with the

resistances of L, RSENSE and ESR to obtain I2R losses.

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