| Electronic Components Datasheet Search |
|
K64F Datasheet(PDF) 7 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
K64F Datasheet(HTML) 7 Page - NXP Semiconductors |
|
7 / 85 page ![]() 2.2.1 Voltage and current operating requirements Table 1. Voltage and current operating requirements Symbol Description Min. Max. Unit Notes VDD Supply voltage 1.71 3.6 V VDDA Analog supply voltage 1.71 3.6 V VDD – VDDA VDD-to-VDDA differential voltage –0.1 0.1 V VSS – VSSA VSS-to-VSSA differential voltage –0.1 0.1 V VBAT RTC battery supply voltage 1.71 3.6 V VIH Input high voltage • 2.7 V ≤ VDD ≤ 3.6 V • 1.7 V ≤ VDD ≤ 2.7 V 0.7 × VDD 0.75 × VDD — — V V VIL Input low voltage • 2.7 V ≤ VDD ≤ 3.6 V • 1.7 V ≤ VDD ≤ 2.7 V — — 0.35 × VDD 0.3 × VDD V V VHYS Input hysteresis 0.06 × VDD — V IICDIO Digital pin negative DC injection current — single pin • VIN < VSS-0.3V -5 — mA 1 IICAIO Analog2, EXTAL, and XTAL pin DC injection current — single pin • VIN < VSS-0.3V (Negative current injection) • VIN > VDD+0.3V (Positive current injection) -5 — — +5 mA 3 IICcont Contiguous pin DC injection current —regional limit, includes sum of negative injection currents or sum of positive injection currents of 16 contiguous pins • Negative current injection • Positive current injection -25 — — +25 mA VODPU Open drain pullup voltage level VDD VDD V 4 VRAM VDD voltage required to retain RAM 1.2 — V VRFVBAT VBAT voltage required to retain the VBAT register file VPOR_VBAT — V 1. All 5 V tolerant digital I/O pins are internally clamped to VSS through an ESD protection diode. There is no diode connection to VDD. If VIN is less than VDIO_MIN, a current limiting resistor is required. If VIN greater than VDIO_MIN (=VSS-0.3V) is observed, then there is no need to provide current limiting resistors at the pads. The negative DC injection current limiting resistor is calculated as R=(VDIO_MIN-VIN)/|IICDIO|. 2. Analog pins are defined as pins that do not have an associated general purpose I/O port function. Additionally, EXTAL and XTAL are analog pins. 3. All analog pins are internally clamped to VSS and VDD through ESD protection diodes. If VIN is less than VAIO_MIN or greater than VAIO_MAX, a current limiting resistor is required. The negative DC injection current limiting resistor is calculated as R=(VAIO_MIN-VIN)/|IICAIO|. The positive injection current limiting resistor is calculated as R=(VIN- VAIO_MAX)/|IICAIO|. Select the larger of these two calculated resistances if the pin is exposed to positive and negative injection currents. 4. Open drain outputs must be pulled to VDD. General Kinetis K64F Sub-Family Data Sheet, Rev. 7, 11/2016 7 NXP Semiconductors |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |