K64F datasheet(13/85 Pages) NXP

13 / 85 page

Table 6. Power consumption operating behaviors (continued)

Symbol

Description

Min.

Typ.

Max.

Unit

Notes

IDD_VBAT Average current when CPU is not accessing

RTC registers

• @ 1.8 V

• @ –40 to 25°C

• @ 70°C

• @ 105°C

• @ 3.0 V

• @ –40 to 25°C

• @ 70°C

• @ 105°C

—

0.59

1.0

3.0

0.71

1.22

3.5

0.70

1.30

4.42

0.84

1.59

5.15

μA

1. The analog supply current is the sum of the active or disabled current for each of the analog modules on the device.

See each module's specification for its supply current.

2. 120 MHz core and system clock, 60 MHz bus, 30 Mhz FlexBus clock, and 20 MHz flash clock. MCG configured for

PEE mode. All peripheral clocks disabled.

3. 120 MHz core and system clock, 60 MHz bus clock, 30 MHz Flexbus clock, and 20 MHz flash clock. MCG configured

for PEE mode. All peripheral clocks enabled.

4. Max values are measured with CPU executing DSP instructions.

5. 25 MHz core and system clock, 25 MHz bus clock, and 25 MHz FlexBus and flash clock. MCG configured for FEI

mode.

6. 4 MHz core, system, FlexBus, and bus clock and 0.5 MHz flash clock. MCG configured for BLPE mode. All peripheral

clocks disabled. Code executing from flash.

7. 4 MHz core, system, FlexBus, and bus clock and 0.5 MHz flash clock. MCG configured for BLPE mode. All peripheral

clocks enabled but peripherals are not in active operation. Code executing from flash.

8. 4 MHz core, system, FlexBus, and bus clock and 0.5 MHz flash clock. MCG configured for BLPE mode. All peripheral

clocks disabled.

9. Data reflects devices with 256 KB of RAM.

10. Includes 32kHz oscillator current and RTC operation.

Table 7. Low power mode peripheral adders — typical value

Symbol

Description

Temperature (°C)

Unit

-40

105

IIREFSTEN4MHz

4 MHz internal reference clock (IRC)

adder. Measured by entering STOP or

VLPS mode with 4 MHz IRC enabled.

µA

IIREFSTEN32KHz

32 kHz internal reference clock (IRC)

adder. Measured by entering STOP

mode with the 32 kHz IRC enabled.

µA

IEREFSTEN4MHz

External 4 MHz crystal clock adder.

Measured by entering STOP or VLPS

mode with the crystal enabled.

206

228

237

245

251

258

IEREFSTEN32KHz

External 32 kHz crystal clock adder by

means of the OSC0_CR[EREFSTEN

and EREFSTEN] bits. Measured by

Table continues on the next page...

General

Kinetis K64F Sub-Family Data Sheet, Rev. 7, 11/2016

NXP Semiconductors

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