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ENS210 Datasheet(PDF) 13 Page - ams AG |
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ENS210 Datasheet(HTML) 13 Page - ams AG |
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13 / 43 page ![]() ams Datasheet Page 13 [v1-02] 2018-Feb-19 Document Feedback ENS210 − Functional Description The I²C Interface The ENS210 is an I²C slave device. The I²C interface supports standard (100kbit/s) and fast (400kbit/s) mode. Details on I²C protocol is according to I²C-bus specifications [UM10204, I²C-bus specification and user manual, Rev. 6, 4 April 2014]. The device applies all mandatory I²C protocol features for slaves: START, STOP, Acknowledge, 7-bit slave address. ENS210 does not use clock stretching. None of the other optional features (10-bit slave address, General Call, Software reset, or Device ID) are supported, nor are the master features (Synchronization, Arbitration, START byte). I²C Operations on Registers The ENS210 uses a register model to interact with it. This means that an I²C master can write a value to one of the registers of a slave, or that it can read from one of the registers of the slave. In the ENS210, registers are addressed using 1 byte. The values stored in a register are also 1 byte. However, the ENS210 implements “auto increment” which means that it is possible to read, for example, two bytes by supplying the address of the first byte and then reading two bytes. Figure 16: I²C Transaction Formats A typical write transaction (see Figure 16 a) therefore has the following format. The master initiates a transaction with a so-called start condition “s”. This blocks the bus. Next, the master sends the 7 bits ENS210 slave address followed by a 1 bit direction (a 0 indicating write “w”). This byte is acknowledged “a” by the slave. The master continues by sending the 8 bit register address, which is acknowledged by the slave. master slave s r w a n p start/stop read/write ack/nack s slave address w a s slave address w a s slave address r a reg val reg val a a n p (a) (b) reg addr a reg val a reg val a p a reg addr reg val a reg val |
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